Message ID | 20201209195701.805254-1-niklas.soderlund+renesas@ragnatech.se (mailing list archive) |
---|---|
State | Superseded |
Delegated to: | Geert Uytterhoeven |
Headers | show |
Series | dt-bindings: timer: renesas,cmt: Document R8A77961 | expand |
On Wed, 09 Dec 2020 20:57:01 +0100, Niklas Söderlund wrote: > Add missing bindings for M3-W+. > > Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> > --- > Documentation/devicetree/bindings/timer/renesas,cmt.yaml | 2 ++ > 1 file changed, 2 insertions(+) > Reviewed-by: Rob Herring <robh@kernel.org>
On Wed, Dec 9, 2020 at 8:57 PM Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> wrote: > Add missing bindings for M3-W+. > > Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Gr{oetje,eeting}s, Geert
Hello, I'm unsure if I should ping Daniel or Rob about picking up this patch as you both have picked patches for this in the past. Sorry for pinging both of you. On 2020-12-09 20:57:01 +0100, Niklas Söderlund wrote: > Add missing bindings for M3-W+. > > Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> > --- > Documentation/devicetree/bindings/timer/renesas,cmt.yaml | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/Documentation/devicetree/bindings/timer/renesas,cmt.yaml b/Documentation/devicetree/bindings/timer/renesas,cmt.yaml > index 428db3a21bb9c384..d16b5a243ed48eef 100644 > --- a/Documentation/devicetree/bindings/timer/renesas,cmt.yaml > +++ b/Documentation/devicetree/bindings/timer/renesas,cmt.yaml > @@ -74,6 +74,7 @@ properties: > - renesas,r8a774e1-cmt0 # 32-bit CMT0 on RZ/G2H > - renesas,r8a7795-cmt0 # 32-bit CMT0 on R-Car H3 > - renesas,r8a7796-cmt0 # 32-bit CMT0 on R-Car M3-W > + - renesas,r8a77961-cmt0 # 32-bit CMT0 on R-Car M3-W+ > - renesas,r8a77965-cmt0 # 32-bit CMT0 on R-Car M3-N > - renesas,r8a77970-cmt0 # 32-bit CMT0 on R-Car V3M > - renesas,r8a77980-cmt0 # 32-bit CMT0 on R-Car V3H > @@ -89,6 +90,7 @@ properties: > - renesas,r8a774e1-cmt1 # 48-bit CMT on RZ/G2H > - renesas,r8a7795-cmt1 # 48-bit CMT on R-Car H3 > - renesas,r8a7796-cmt1 # 48-bit CMT on R-Car M3-W > + - renesas,r8a77961-cmt1 # 48-bit CMT on R-Car M3-W+ > - renesas,r8a77965-cmt1 # 48-bit CMT on R-Car M3-N > - renesas,r8a77970-cmt1 # 48-bit CMT on R-Car V3M > - renesas,r8a77980-cmt1 # 48-bit CMT on R-Car V3H > -- > 2.29.2 >
Hi Again, Sorry for the spam. I noticed Rob replied to a similar patch and asked me to resend it with tags to Daniel for him to collect. Will do the same for this patch. On 2021-02-11 11:28:07 +0100, Niklas Söderlund wrote: > Hello, > > I'm unsure if I should ping Daniel or Rob about picking up this patch as > you both have picked patches for this in the past. Sorry for pinging > both of you. > > On 2020-12-09 20:57:01 +0100, Niklas Söderlund wrote: > > Add missing bindings for M3-W+. > > > > Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> > > --- > > Documentation/devicetree/bindings/timer/renesas,cmt.yaml | 2 ++ > > 1 file changed, 2 insertions(+) > > > > diff --git a/Documentation/devicetree/bindings/timer/renesas,cmt.yaml b/Documentation/devicetree/bindings/timer/renesas,cmt.yaml > > index 428db3a21bb9c384..d16b5a243ed48eef 100644 > > --- a/Documentation/devicetree/bindings/timer/renesas,cmt.yaml > > +++ b/Documentation/devicetree/bindings/timer/renesas,cmt.yaml > > @@ -74,6 +74,7 @@ properties: > > - renesas,r8a774e1-cmt0 # 32-bit CMT0 on RZ/G2H > > - renesas,r8a7795-cmt0 # 32-bit CMT0 on R-Car H3 > > - renesas,r8a7796-cmt0 # 32-bit CMT0 on R-Car M3-W > > + - renesas,r8a77961-cmt0 # 32-bit CMT0 on R-Car M3-W+ > > - renesas,r8a77965-cmt0 # 32-bit CMT0 on R-Car M3-N > > - renesas,r8a77970-cmt0 # 32-bit CMT0 on R-Car V3M > > - renesas,r8a77980-cmt0 # 32-bit CMT0 on R-Car V3H > > @@ -89,6 +90,7 @@ properties: > > - renesas,r8a774e1-cmt1 # 48-bit CMT on RZ/G2H > > - renesas,r8a7795-cmt1 # 48-bit CMT on R-Car H3 > > - renesas,r8a7796-cmt1 # 48-bit CMT on R-Car M3-W > > + - renesas,r8a77961-cmt1 # 48-bit CMT on R-Car M3-W+ > > - renesas,r8a77965-cmt1 # 48-bit CMT on R-Car M3-N > > - renesas,r8a77970-cmt1 # 48-bit CMT on R-Car V3M > > - renesas,r8a77980-cmt1 # 48-bit CMT on R-Car V3H > > -- > > 2.29.2 > > > > -- > Regards, > Niklas Söderlund
diff --git a/Documentation/devicetree/bindings/timer/renesas,cmt.yaml b/Documentation/devicetree/bindings/timer/renesas,cmt.yaml index 428db3a21bb9c384..d16b5a243ed48eef 100644 --- a/Documentation/devicetree/bindings/timer/renesas,cmt.yaml +++ b/Documentation/devicetree/bindings/timer/renesas,cmt.yaml @@ -74,6 +74,7 @@ properties: - renesas,r8a774e1-cmt0 # 32-bit CMT0 on RZ/G2H - renesas,r8a7795-cmt0 # 32-bit CMT0 on R-Car H3 - renesas,r8a7796-cmt0 # 32-bit CMT0 on R-Car M3-W + - renesas,r8a77961-cmt0 # 32-bit CMT0 on R-Car M3-W+ - renesas,r8a77965-cmt0 # 32-bit CMT0 on R-Car M3-N - renesas,r8a77970-cmt0 # 32-bit CMT0 on R-Car V3M - renesas,r8a77980-cmt0 # 32-bit CMT0 on R-Car V3H @@ -89,6 +90,7 @@ properties: - renesas,r8a774e1-cmt1 # 48-bit CMT on RZ/G2H - renesas,r8a7795-cmt1 # 48-bit CMT on R-Car H3 - renesas,r8a7796-cmt1 # 48-bit CMT on R-Car M3-W + - renesas,r8a77961-cmt1 # 48-bit CMT on R-Car M3-W+ - renesas,r8a77965-cmt1 # 48-bit CMT on R-Car M3-N - renesas,r8a77970-cmt1 # 48-bit CMT on R-Car V3M - renesas,r8a77980-cmt1 # 48-bit CMT on R-Car V3H
Add missing bindings for M3-W+. Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> --- Documentation/devicetree/bindings/timer/renesas,cmt.yaml | 2 ++ 1 file changed, 2 insertions(+)