Message ID | 20201216151931.851547-4-kieran.bingham+renesas@ideasonboard.com (mailing list archive) |
---|---|
State | Accepted |
Delegated to: | Geert Uytterhoeven |
Headers | show |
Series | clk: renesas: r8a779a0: Add FCP and VSP support | expand |
On Wed, Dec 16, 2020 at 4:19 PM Kieran Bingham <kieran.bingham+renesas@ideasonboard.com> wrote: > Add clocks for the VSPX. > > Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com> Let's trust the BSP on the parent clocks... Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> i.e. will queue in renesas-clk-for-v5.12. Gr{oetje,eeting}s, Geert
diff --git a/drivers/clk/renesas/r8a779a0-cpg-mssr.c b/drivers/clk/renesas/r8a779a0-cpg-mssr.c index 2ce31508db73..d7825adcb19d 100644 --- a/drivers/clk/renesas/r8a779a0-cpg-mssr.c +++ b/drivers/clk/renesas/r8a779a0-cpg-mssr.c @@ -192,6 +192,10 @@ static const struct mssr_mod_clk r8a779a0_mod_clks[] __initconst = { DEF_MOD("vin37", 829, R8A779A0_CLK_S1D1), DEF_MOD("vspd0", 830, R8A779A0_CLK_S3D1), DEF_MOD("vspd1", 831, R8A779A0_CLK_S3D1), + DEF_MOD("vspx0", 1028, R8A779A0_CLK_S1D1), + DEF_MOD("vspx1", 1029, R8A779A0_CLK_S1D1), + DEF_MOD("vspx2", 1030, R8A779A0_CLK_S1D1), + DEF_MOD("vspx3", 1031, R8A779A0_CLK_S1D1), }; static spinlock_t cpg_lock;
Add clocks for the VSPX. Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com> --- drivers/clk/renesas/r8a779a0-cpg-mssr.c | 4 ++++ 1 file changed, 4 insertions(+)