Message ID | 20210322172919.1154686-2-kieran.bingham+renesas@ideasonboard.com (mailing list archive) |
---|---|
State | Mainlined |
Commit | e91bb1464df74fc068bd8d26c5177bdedcf7c2d5 |
Delegated to: | Geert Uytterhoeven |
Headers | show |
Series | arm64: dts: renesas: r8a779a0: Add VSP support | expand |
On Mon, Mar 22, 2021 at 6:29 PM Kieran Bingham <kieran.bingham+renesas@ideasonboard.com> wrote: > Provide FCPVD support for the V3U. > > Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> > Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> i.e. will queue in renesas-devel for v5.13. Gr{oetje,eeting}s, Geert
diff --git a/arch/arm64/boot/dts/renesas/r8a779a0.dtsi b/arch/arm64/boot/dts/renesas/r8a779a0.dtsi index 6f3eba4653a3..73036a5b8312 100644 --- a/arch/arm64/boot/dts/renesas/r8a779a0.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a779a0.dtsi @@ -1102,6 +1102,22 @@ gic: interrupt-controller@f1000000 { power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; }; + fcpvd0: fcp@fea10000 { + compatible = "renesas,fcpv"; + reg = <0 0xfea10000 0 0x200>; + clocks = <&cpg CPG_MOD 508>; + power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; + resets = <&cpg 508>; + }; + + fcpvd1: fcp@fea11000 { + compatible = "renesas,fcpv"; + reg = <0 0xfea11000 0 0x200>; + clocks = <&cpg CPG_MOD 509>; + power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; + resets = <&cpg 509>; + }; + prr: chipid@fff00044 { compatible = "renesas,prr"; reg = <0 0xfff00044 0 4>;