Message ID | 20210922212049.19851-3-prabhakar.mahadev-lad.rj@bp.renesas.com (mailing list archive) |
---|---|
State | Accepted |
Delegated to: | Geert Uytterhoeven |
Headers | show |
Series | RZ/G2L SMARC EVK enable ADC and CAN interfaces | expand |
On Wed, Sep 22, 2021 at 11:21 PM Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> wrote: > Enable the ADC which is present on RZ/G2L SMARC SOM. > > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> i.e. will queue in renesas-devel for v5.16. Gr{oetje,eeting}s, Geert
diff --git a/arch/arm64/boot/dts/renesas/rzg2l-smarc-som.dtsi b/arch/arm64/boot/dts/renesas/rzg2l-smarc-som.dtsi index 0748f2e7396a..da1ee2206e1a 100644 --- a/arch/arm64/boot/dts/renesas/rzg2l-smarc-som.dtsi +++ b/arch/arm64/boot/dts/renesas/rzg2l-smarc-som.dtsi @@ -5,6 +5,8 @@ * Copyright (C) 2021 Renesas Electronics Corp. */ +#include <dt-bindings/pinctrl/rzg2l-pinctrl.h> + / { memory@48000000 { device_type = "memory"; @@ -13,6 +15,21 @@ }; }; +&adc { + pinctrl-0 = <&adc_pins>; + pinctrl-names = "default"; + status = "okay"; + + /delete-node/ channel@6; + /delete-node/ channel@7; +}; + &extal_clk { clock-frequency = <24000000>; }; + +&pinctrl { + adc_pins: adc { + pinmux = <RZG2L_PORT_PINMUX(9, 0, 2)>; /* ADC_TRG */ + }; +};