From patchwork Fri Nov 26 09:54:44 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kieran Bingham X-Patchwork-Id: 12640331 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 291F7C4321E for ; Fri, 26 Nov 2021 10:02:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1345420AbhKZKGK (ORCPT ); Fri, 26 Nov 2021 05:06:10 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33556 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1345252AbhKZKEK (ORCPT ); Fri, 26 Nov 2021 05:04:10 -0500 Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [IPv6:2001:4b98:dc2:55:216:3eff:fef7:d647]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8BAC3C06137B; Fri, 26 Nov 2021 01:54:52 -0800 (PST) Received: from Monstersaurus.local (cpc89244-aztw30-2-0-cust3082.18-1.cable.virginm.net [86.31.172.11]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id 6802A148B; Fri, 26 Nov 2021 10:54:50 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1637920490; bh=hmNui8XCdrKvQSmTrDckboopLPXlwrqh9KmdLB9qU24=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=djGveyl6TtNGde/Mmph/9iLvTPZbjIyvQIjNICKciT9Ml/HBoKwjX1zLweHTCSrhE C65v0e1fYkBHI1byo8v/vFpAvLhOyOBY+yippMVsyTFltQv2c1CtOSckIEL7CoAEwj O7PKxUqndHfQ/fRWrmZARbW9B7Xk3IV+ysnSA3MQ= From: Kieran Bingham To: linux-renesas-soc@vger.kernel.org, Laurent Pinchart , Geert Uytterhoeven Cc: Kieran Bingham , Geert Uytterhoeven , Magnus Damm , Rob Herring , devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS), linux-kernel@vger.kernel.org (open list) Subject: [PATCH v4 3/4] arm64: dts: renesas: r8a779a0: falcon-cpu: Add DSI display output Date: Fri, 26 Nov 2021 09:54:44 +0000 Message-Id: <20211126095445.932930-4-kieran.bingham+renesas@ideasonboard.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20211126095445.932930-1-kieran.bingham+renesas@ideasonboard.com> References: <20211126095445.932930-1-kieran.bingham+renesas@ideasonboard.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org Provide the display output using the sn65dsi86 MIPI DSI bridge Reviewed-by: Laurent Pinchart Signed-off-by: Kieran Bingham --- v3: - Fix the voltage regulator values - No longer override the clocks - use clk-x6 as clock node name .../boot/dts/renesas/r8a779a0-falcon-cpu.dtsi | 79 +++++++++++++++++++ 1 file changed, 79 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r8a779a0-falcon-cpu.dtsi b/arch/arm64/boot/dts/renesas/r8a779a0-falcon-cpu.dtsi index cd2f0d60f21a..62b62656b486 100644 --- a/arch/arm64/boot/dts/renesas/r8a779a0-falcon-cpu.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a779a0-falcon-cpu.dtsi @@ -98,6 +98,15 @@ memory@700000000 { reg = <0x7 0x00000000 0x0 0x80000000>; }; + reg_1p2v: regulator-1p2v { + compatible = "regulator-fixed"; + regulator-name = "fixed-1.2V"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-boot-on; + regulator-always-on; + }; + reg_1p8v: regulator-1p8v { compatible = "regulator-fixed"; regulator-name = "fixed-1.8V"; @@ -115,6 +124,41 @@ reg_3p3v: regulator-3p3v { regulator-boot-on; regulator-always-on; }; + + mini-dp-con { + compatible = "dp-connector"; + label = "CN5"; + type = "mini"; + + port { + mini_dp_con_in: endpoint { + remote-endpoint = <&sn65dsi86_out>; + }; + }; + }; + + sn65dsi86_refclk: clk-x6 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <38400000>; + }; +}; + +&dsi0 { + status = "okay"; + + ports { + port@1 { + endpoint { + remote-endpoint = <&sn65dsi86_in>; + data-lanes = <1 2 3 4>; + }; + }; + }; +}; + +&du { + status = "okay"; }; &extal_clk { @@ -146,6 +190,41 @@ &i2c1 { status = "okay"; clock-frequency = <400000>; + + sn65dsi86@2c { + compatible = "ti,sn65dsi86"; + reg = <0x2c>; + + clocks = <&sn65dsi86_refclk>; + clock-names = "refclk"; + + interrupt-parent = <&gpio1>; + interrupts = <24 IRQ_TYPE_LEVEL_HIGH>; + + vccio-supply = <®_1p8v>; + vpll-supply = <®_1p8v>; + vcca-supply = <®_1p2v>; + vcc-supply = <®_1p2v>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + sn65dsi86_in: endpoint { + remote-endpoint = <&dsi0_out>; + }; + }; + + port@1 { + reg = <1>; + sn65dsi86_out: endpoint { + remote-endpoint = <&mini_dp_con_in>; + }; + }; + }; + }; }; &i2c6 {