| Message ID | 20211209143228.525234-2-miquel.raynal@bootlin.com (mailing list archive) |
|---|---|
| State | Superseded |
| Delegated to: | Geert Uytterhoeven |
| Headers | show |
| Series | Renesas RZ/N1 NAND controller support | expand |
On Thu, Dec 09, 2021 at 03:32:25PM +0100, Miquel Raynal wrote: > Add a Yaml description for this Renesas NAND controller bindings. > > Provide a family-specific "rzn1" compatible and a more specific > "r9a06g032" one. > > Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> > Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> > --- > .../mtd/renesas,rzn1-nand-controller.yaml | 64 +++++++++++++++++++ > 1 file changed, 64 insertions(+) > create mode 100644 Documentation/devicetree/bindings/mtd/renesas,rzn1-nand-controller.yaml > > diff --git a/Documentation/devicetree/bindings/mtd/renesas,rzn1-nand-controller.yaml b/Documentation/devicetree/bindings/mtd/renesas,rzn1-nand-controller.yaml > new file mode 100644 > index 000000000000..cc6a358e33d1 > --- /dev/null > +++ b/Documentation/devicetree/bindings/mtd/renesas,rzn1-nand-controller.yaml > @@ -0,0 +1,64 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/mtd/renesas,rzn1-nand-controller.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Renesas RZ/N1x NAND flash controller device tree bindings > + > +maintainers: > + - Miquel Raynal <miquel.raynal@bootlin.com> > + > +allOf: > + - $ref: "nand-controller.yaml" > + > +properties: > + compatible: > + items: > + - enum: > + - renesas,r9a06g032-nand-controller > + - const: renesas,rzn1-nand-controller > + > + reg: > + maxItems: 1 > + > + interrupts: > + maxItems: 1 > + > + clocks: > + items: > + - description: APB host controller clock > + - description: External NAND bus clock > + > + clock-names: > + items: > + - const: nand_hclk > + - const: nand_eclk 'nand_' is redundant. > + > + "#address-cells": true > + "#size-cells": true > + > +required: > + - compatible > + - reg > + - clocks > + - clock-names > + - interrupts > + > +additionalProperties: true unevaluatedProperties: false > + > +examples: > + - | > + #include <dt-bindings/interrupt-controller/arm-gic.h> > + #include <dt-bindings/clock/r9a06g032-sysctrl.h> > + > + nand-controller@40102000 { > + compatible = "renesas,r9a06g032-nand-controller", > + "renesas,rzn1-nand-controller"; > + reg = <0x40102000 0x2000>; > + interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&sysctrl R9A06G032_HCLK_NAND>, <&sysctrl R9A06G032_CLK_NAND>; > + clock-names = "nand_hclk", "nand_eclk"; > + #address-cells = <1>; > + #size-cells = <0>; > + }; > -- > 2.27.0 > >
Hi Rob, > > + clock-names: > > + items: > > + - const: nand_hclk > > + - const: nand_eclk > > 'nand_' is redundant. Actually the nand_ prefix was voluntary to be consistent with the specification which called these two clocks NAND_HCLK and NAND_EXLK. But whatever, I'll change the names. > > + "#address-cells": true > > + "#size-cells": true > > + > > +required: > > + - compatible > > + - reg > > + - clocks > > + - clock-names > > + - interrupts > > + > > +additionalProperties: true > > unevaluatedProperties: false Not sure why I proposed this property in the first place. I'll correct. Thanks, Miquèl
diff --git a/Documentation/devicetree/bindings/mtd/renesas,rzn1-nand-controller.yaml b/Documentation/devicetree/bindings/mtd/renesas,rzn1-nand-controller.yaml new file mode 100644 index 000000000000..cc6a358e33d1 --- /dev/null +++ b/Documentation/devicetree/bindings/mtd/renesas,rzn1-nand-controller.yaml @@ -0,0 +1,64 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mtd/renesas,rzn1-nand-controller.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Renesas RZ/N1x NAND flash controller device tree bindings + +maintainers: + - Miquel Raynal <miquel.raynal@bootlin.com> + +allOf: + - $ref: "nand-controller.yaml" + +properties: + compatible: + items: + - enum: + - renesas,r9a06g032-nand-controller + - const: renesas,rzn1-nand-controller + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + items: + - description: APB host controller clock + - description: External NAND bus clock + + clock-names: + items: + - const: nand_hclk + - const: nand_eclk + + "#address-cells": true + "#size-cells": true + +required: + - compatible + - reg + - clocks + - clock-names + - interrupts + +additionalProperties: true + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/clock/r9a06g032-sysctrl.h> + + nand-controller@40102000 { + compatible = "renesas,r9a06g032-nand-controller", + "renesas,rzn1-nand-controller"; + reg = <0x40102000 0x2000>; + interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&sysctrl R9A06G032_HCLK_NAND>, <&sysctrl R9A06G032_CLK_NAND>; + clock-names = "nand_hclk", "nand_eclk"; + #address-cells = <1>; + #size-cells = <0>; + };