From patchwork Fri Feb 18 18:12:23 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 12751706 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id EAF73C43219 for ; Fri, 18 Feb 2022 18:12:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239024AbiBRSNA (ORCPT ); Fri, 18 Feb 2022 13:13:00 -0500 Received: from mxb-00190b01.gslb.pphosted.com ([23.128.96.19]:35686 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239026AbiBRSM7 (ORCPT ); Fri, 18 Feb 2022 13:12:59 -0500 Received: from relay7-d.mail.gandi.net (relay7-d.mail.gandi.net [IPv6:2001:4b98:dc4:8::227]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 109293630E; Fri, 18 Feb 2022 10:12:41 -0800 (PST) Received: (Authenticated sender: miquel.raynal@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id EC4D720007; Fri, 18 Feb 2022 18:12:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1645207958; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=pO+KRyzg9QXvLLS1vxx5wuXMcb4+oWxgonKkd1sluA4=; b=Kgo34du3V2GiYduH6vpZpZRUPe8x5/MPmUYTpGwmr592Ufn1FM1TGvEsqyMvn5ETgEpNYF IgHIJV22opL8fGAkmxcfn3jTZpLUwHR31tGDv6tVqDgS7DUjSo9/oz9+EdCY6lKtz1nClS cAD+if4ba9fD+faeKJJTV7SkaRO1iE+pATDmBhWxlsPbSKe+Z7vNLmk6sEEuFBUiRuJwca R4NfWpZg+srzG7L3GnZmX41ZBV9mA5/NR13u+d3pHMAh3yVUM1IyYkzL0DIVs3dkVAzhga jYH/hDVps0lHxS1s0PpDpyt1X4cOBgKzY6GY8s0R74YYvLOMeETnjK1N/t0G4g== From: Miquel Raynal To: Viresh Kumar , Andy Shevchenko , Vinod Koul , Geert Uytterhoeven , Magnus Damm , Michael Turquette , Stephen Boyd Cc: Rob Herring , , dmaengine@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, Thomas Petazzoni , Milan Stevanovic , Jimmy Lalande , Laetitia MARIOTTINI , Phil Edworthy , Miquel Raynal Subject: [PATCH 5/8] dma: dw: Avoid partial transfers Date: Fri, 18 Feb 2022 19:12:23 +0100 Message-Id: <20220218181226.431098-6-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220218181226.431098-1-miquel.raynal@bootlin.com> References: <20220218181226.431098-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org From: Phil Edworthy Pausing a partial transfer only causes data to be written to mem that is a multiple of the memory width setting. However, when a DMA client driver finishes DMA early, e.g. due to UART char timeout interrupt, all data read from the DEV must be written to MEM. Therefore, allow the slave to limit the memory width to ensure all data read from the DEV is written to MEM when DMA is paused. Signed-off-by: Phil Edworthy Signed-off-by: Miquel Raynal --- drivers/dma/dw/core.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/dma/dw/core.c b/drivers/dma/dw/core.c index 7ab83fe601ed..48cdefe997f1 100644 --- a/drivers/dma/dw/core.c +++ b/drivers/dma/dw/core.c @@ -705,6 +705,9 @@ dwc_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl, ctllo |= sconfig->device_fc ? DWC_CTLL_FC(DW_DMA_FC_P_P2M) : DWC_CTLL_FC(DW_DMA_FC_D_P2M); + if (sconfig->dst_addr_width && sconfig->dst_addr_width < data_width) + data_width = sconfig->dst_addr_width; + for_each_sg(sgl, sg, sg_len, i) { struct dw_desc *desc; u32 len, mem;