Message ID | 20220221171340.11113-3-laurent.pinchart+renesas@ideasonboard.com (mailing list archive) |
---|---|
State | Mainlined |
Commit | 8ba3c7bd4dca7ac358e834eabf840012d9564356 |
Delegated to: | Kieran Bingham |
Headers | show |
Series | drm: rcar-du: Avoid flicker when enabling a VSP plane | expand |
Quoting Laurent Pinchart (2022-02-21 17:13:40) > On Gen3 hardware enabling a VSP plane doesn't change any register that > requires DRES to take effect. Avoid a group restart in that case. This also makes it clear that the need_restart is due to the change occuring in the VSP1 sink, so I think this is cleaner all round. Reviewed-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com> > > Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> > --- > drivers/gpu/drm/rcar-du/rcar_du_plane.c | 6 ++++++ > drivers/gpu/drm/rcar-du/rcar_du_vsp.c | 9 --------- > 2 files changed, 6 insertions(+), 9 deletions(-) > > diff --git a/drivers/gpu/drm/rcar-du/rcar_du_plane.c b/drivers/gpu/drm/rcar-du/rcar_du_plane.c > index 9b058d6cb032..22aeeb1cc1fb 100644 > --- a/drivers/gpu/drm/rcar-du/rcar_du_plane.c > +++ b/drivers/gpu/drm/rcar-du/rcar_du_plane.c > @@ -560,6 +560,12 @@ void __rcar_du_plane_setup(struct rcar_du_group *rgrp, > if (rcdu->vspd1_sink != vspd1_sink) { > rcdu->vspd1_sink = vspd1_sink; > rcar_du_set_dpad0_vsp1_routing(rcdu); > + > + /* > + * Changes to the VSP1 sink take effect on DRES and thus > + * need a restart of the group. > + */ > + rgrp->need_restart = true; > } > } > } > diff --git a/drivers/gpu/drm/rcar-du/rcar_du_vsp.c b/drivers/gpu/drm/rcar-du/rcar_du_vsp.c > index b7fc5b069cbc..32530d698e75 100644 > --- a/drivers/gpu/drm/rcar-du/rcar_du_vsp.c > +++ b/drivers/gpu/drm/rcar-du/rcar_du_vsp.c > @@ -84,15 +84,6 @@ void rcar_du_vsp_enable(struct rcar_du_crtc *crtc) > > __rcar_du_plane_setup(crtc->group, &state); > > - /* > - * Ensure that the plane source configuration takes effect by requesting > - * a restart of the group. See rcar_du_plane_atomic_update() for a more > - * detailed explanation. > - * > - * TODO: Check whether this is still needed on Gen3. > - */ > - crtc->group->need_restart = true; > - > vsp1_du_setup_lif(crtc->vsp->vsp, crtc->vsp_pipe, &cfg); > } > > -- > Regards, > > Laurent Pinchart >
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_plane.c b/drivers/gpu/drm/rcar-du/rcar_du_plane.c index 9b058d6cb032..22aeeb1cc1fb 100644 --- a/drivers/gpu/drm/rcar-du/rcar_du_plane.c +++ b/drivers/gpu/drm/rcar-du/rcar_du_plane.c @@ -560,6 +560,12 @@ void __rcar_du_plane_setup(struct rcar_du_group *rgrp, if (rcdu->vspd1_sink != vspd1_sink) { rcdu->vspd1_sink = vspd1_sink; rcar_du_set_dpad0_vsp1_routing(rcdu); + + /* + * Changes to the VSP1 sink take effect on DRES and thus + * need a restart of the group. + */ + rgrp->need_restart = true; } } } diff --git a/drivers/gpu/drm/rcar-du/rcar_du_vsp.c b/drivers/gpu/drm/rcar-du/rcar_du_vsp.c index b7fc5b069cbc..32530d698e75 100644 --- a/drivers/gpu/drm/rcar-du/rcar_du_vsp.c +++ b/drivers/gpu/drm/rcar-du/rcar_du_vsp.c @@ -84,15 +84,6 @@ void rcar_du_vsp_enable(struct rcar_du_crtc *crtc) __rcar_du_plane_setup(crtc->group, &state); - /* - * Ensure that the plane source configuration takes effect by requesting - * a restart of the group. See rcar_du_plane_atomic_update() for a more - * detailed explanation. - * - * TODO: Check whether this is still needed on Gen3. - */ - crtc->group->need_restart = true; - vsp1_du_setup_lif(crtc->vsp->vsp, crtc->vsp_pipe, &cfg); }
On Gen3 hardware enabling a VSP plane doesn't change any register that requires DRES to take effect. Avoid a group restart in that case. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> --- drivers/gpu/drm/rcar-du/rcar_du_plane.c | 6 ++++++ drivers/gpu/drm/rcar-du/rcar_du_vsp.c | 9 --------- 2 files changed, 6 insertions(+), 9 deletions(-)