| Message ID | 20220309190631.1576372-1-kieran.bingham+renesas@ideasonboard.com (mailing list archive) |
|---|---|
| State | Mainlined |
| Commit | d4417743a2d3f501f6345b2768f6d9df30b923a9 |
| Delegated to: | Geert Uytterhoeven |
| Headers | show |
| Series | [v2] arm64: dts: renesas: falcon-cpu: Use INTC_EX for SN65DSI86 | expand |
On Wed, Mar 9, 2022 at 8:06 PM Kieran Bingham <kieran.bingham+renesas@ideasonboard.com> wrote: > The INTC block is a better choice for handling the interrupts on the V3U > as the INTC will always be powered, while the GPIO block may be > de-clocked if not in use. Further more, it may be likely to have a lower > power consumption as it does not need to drive the pins. > > Switch the interrupt parent and interrupts definition from gpio1 to > irq0 on intc_ex, and configure the PFC accordingly. > > Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com> > > --- > v2: > > - Define irq0_pins, and ensure pinctrl is set in the bridge node. Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> i.e. will queue in renesas-devel for v5.19. Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
diff --git a/arch/arm64/boot/dts/renesas/r8a779a0-falcon-cpu.dtsi b/arch/arm64/boot/dts/renesas/r8a779a0-falcon-cpu.dtsi index 6af3f4f4f268..53c4a26198e3 100644 --- a/arch/arm64/boot/dts/renesas/r8a779a0-falcon-cpu.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a779a0-falcon-cpu.dtsi @@ -192,14 +192,17 @@ &i2c1 { clock-frequency = <400000>; bridge@2c { + pinctrl-0 = <&irq0_pins>; + pinctrl-names = "default"; + compatible = "ti,sn65dsi86"; reg = <0x2c>; clocks = <&sn65dsi86_refclk>; clock-names = "refclk"; - interrupt-parent = <&gpio1>; - interrupts = <24 IRQ_TYPE_LEVEL_HIGH>; + interrupt-parent = <&intc_ex>; + interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; vccio-supply = <®_1p8v>; vpll-supply = <®_1p8v>; @@ -271,6 +274,11 @@ i2c6_pins: i2c6 { function = "i2c6"; }; + irq0_pins: irq0 { + groups = "intc_ex_irq0"; + function = "intc_ex"; + }; + keys_pins: keys { pins = "GP_6_18", "GP_6_19", "GP_6_20"; bias-pull-up;
The INTC block is a better choice for handling the interrupts on the V3U as the INTC will always be powered, while the GPIO block may be de-clocked if not in use. Further more, it may be likely to have a lower power consumption as it does not need to drive the pins. Switch the interrupt parent and interrupts definition from gpio1 to irq0 on intc_ex, and configure the PFC accordingly. Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com> --- v2: - Define irq0_pins, and ensure pinctrl is set in the bridge node. --- arch/arm64/boot/dts/renesas/r8a779a0-falcon-cpu.dtsi | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-)