Message ID | 20220620102600.52349-3-phil.edworthy@renesas.com (mailing list archive) |
---|---|
State | Superseded |
Delegated to: | Geert Uytterhoeven |
Headers | show |
Series | arm64: renesas: Add RZ/V2M watchdog support | expand |
On Mon, Jun 20, 2022 at 12:26 PM Phil Edworthy <phil.edworthy@renesas.com> wrote: > The WDT on RZ/V2M devices is basically the same as RZ/G2L, but without > the parity error registers. This means the driver has to reset the > hardware plus set the minimum timeout in order to do a restart and has > a single interrupt. > > Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com> > Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com> > --- > v3: > - Don't call pm_runtime_get_sync() in restart() > - Use mdelay instead of udelay, avoids DIV64_U64_ROUND_UP Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
Hi Phil, Thanks for the patch. > Subject: [PATCH v3 2/2] watchdog: rzg2l_wdt: Add rzv2m support > > The WDT on RZ/V2M devices is basically the same as RZ/G2L, but without > the parity error registers. This means the driver has to reset the > hardware plus set the minimum timeout in order to do a restart and has a > single interrupt. > > Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com> > Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com> > --- > v3: > - Don't call pm_runtime_get_sync() in restart() > - Use mdelay instead of udelay, avoids DIV64_U64_ROUND_UP > v2: > - Replace use of parity error registers in restart > - Commit msg modified to reflect different contents > --- > drivers/watchdog/rzg2l_wdt.c | 39 ++++++++++++++++++++++++++++++------ > 1 file changed, 33 insertions(+), 6 deletions(-) > > diff --git a/drivers/watchdog/rzg2l_wdt.c b/drivers/watchdog/rzg2l_wdt.c > index 6eea0ee4af49..70cbd9ba01fe 100644 > --- a/drivers/watchdog/rzg2l_wdt.c > +++ b/drivers/watchdog/rzg2l_wdt.c > @@ -10,7 +10,7 @@ > #include <linux/io.h> > #include <linux/kernel.h> > #include <linux/module.h> > -#include <linux/of.h> > +#include <linux/of_device.h> > #include <linux/platform_device.h> > #include <linux/pm_runtime.h> > #include <linux/reset.h> > @@ -40,6 +40,11 @@ module_param(nowayout, bool, 0); > MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started > (default=" > __MODULE_STRING(WATCHDOG_NOWAYOUT) ")"); > > +enum rz_wdt_type { > + I2C_RZG2L, > + I2C_RZV2M, > +}; > + May be I2C_* to WDT_* ?? > struct rzg2l_wdt_priv { > void __iomem *base; > struct watchdog_device wdev; > @@ -48,6 +53,7 @@ struct rzg2l_wdt_priv { > unsigned long delay; > struct clk *pclk; > struct clk *osc_clk; > + enum rz_wdt_type devtype; > }; > > static void rzg2l_wdt_wait_delay(struct rzg2l_wdt_priv *priv) @@ - > 142,11 +148,29 @@ static int rzg2l_wdt_restart(struct watchdog_device > *wdev, > clk_prepare_enable(priv->pclk); > clk_prepare_enable(priv->osc_clk); > > - /* Generate Reset (WDTRSTB) Signal on parity error */ > - rzg2l_wdt_write(priv, 0, PECR); > + if (priv->devtype == I2C_RZG2L) { Same here. > + /* Generate Reset (WDTRSTB) Signal on parity error */ > + rzg2l_wdt_write(priv, 0, PECR); > + > + /* Force parity error */ > + rzg2l_wdt_write(priv, PEEN_FORCE, PEEN); > + } else { > + /* RZ/V2M doesn't have parity error registers */ > + > + wdev->timeout = 0; > + > + /* Initialize time out */ > + rzg2l_wdt_init_timeout(wdev); > > - /* Force parity error */ > - rzg2l_wdt_write(priv, PEEN_FORCE, PEEN); > + /* Initialize watchdog counter register */ > + rzg2l_wdt_write(priv, 0, WDTTIM); > + > + /* Enable watchdog timer*/ > + rzg2l_wdt_write(priv, WDTCNT_WDTEN, WDTCNT); > + > + /* Wait 2 consecutive overflow cycles for reset */ > + mdelay(DIV_ROUND_UP(2 * 0xFFFFF * 1000, priv- > >osc_clk_rate)); > + } > > return 0; > } > @@ -227,6 +251,8 @@ static int rzg2l_wdt_probe(struct platform_device > *pdev) > if (ret) > return dev_err_probe(dev, ret, "failed to deassert"); > > + priv->devtype = (enum rz_wdt_type)of_device_get_match_data(dev); > + > pm_runtime_enable(&pdev->dev); > > priv->wdev.info = &rzg2l_wdt_ident; > @@ -255,7 +281,8 @@ static int rzg2l_wdt_probe(struct platform_device > *pdev) } > > static const struct of_device_id rzg2l_wdt_ids[] = { > - { .compatible = "renesas,rzg2l-wdt", }, > + { .compatible = "renesas,rzg2l-wdt", .data = (void *)I2C_RZG2L }, > + { .compatible = "renesas,rzv2m-wdt", .data = (void *)I2C_RZV2M }, Same here. Cheers, Biju > { /* sentinel */ } > }; > MODULE_DEVICE_TABLE(of, rzg2l_wdt_ids); > -- > 2.34.1
Hi Biju, On 22 August 2022 08:20 Biju Das wrote: > > Subject: [PATCH v3 2/2] watchdog: rzg2l_wdt: Add rzv2m support > > > > The WDT on RZ/V2M devices is basically the same as RZ/G2L, but without > > the parity error registers. This means the driver has to reset the > > hardware plus set the minimum timeout in order to do a restart and has a > > single interrupt. > > > > Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com> > > Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com> > > --- > > v3: > > - Don't call pm_runtime_get_sync() in restart() > > - Use mdelay instead of udelay, avoids DIV64_U64_ROUND_UP > > v2: > > - Replace use of parity error registers in restart > > - Commit msg modified to reflect different contents > > --- > > drivers/watchdog/rzg2l_wdt.c | 39 ++++++++++++++++++++++++++++++------ > > 1 file changed, 33 insertions(+), 6 deletions(-) > > > > diff --git a/drivers/watchdog/rzg2l_wdt.c b/drivers/watchdog/rzg2l_wdt.c > > index 6eea0ee4af49..70cbd9ba01fe 100644 > > --- a/drivers/watchdog/rzg2l_wdt.c > > +++ b/drivers/watchdog/rzg2l_wdt.c > > @@ -10,7 +10,7 @@ > > #include <linux/io.h> > > #include <linux/kernel.h> > > #include <linux/module.h> > > -#include <linux/of.h> > > +#include <linux/of_device.h> > > #include <linux/platform_device.h> > > #include <linux/pm_runtime.h> > > #include <linux/reset.h> > > @@ -40,6 +40,11 @@ module_param(nowayout, bool, 0); > > MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started > > (default=" > > __MODULE_STRING(WATCHDOG_NOWAYOUT) ")"); > > > > +enum rz_wdt_type { > > + I2C_RZG2L, > > + I2C_RZV2M, > > +}; > > + > > May be I2C_* to WDT_* ?? Oops, yes I will fix this. Thanks Phil > > struct rzg2l_wdt_priv { > > void __iomem *base; > > struct watchdog_device wdev; > > @@ -48,6 +53,7 @@ struct rzg2l_wdt_priv { > > unsigned long delay; > > struct clk *pclk; > > struct clk *osc_clk; > > + enum rz_wdt_type devtype; > > }; > > > > static void rzg2l_wdt_wait_delay(struct rzg2l_wdt_priv *priv) @@ - > > 142,11 +148,29 @@ static int rzg2l_wdt_restart(struct watchdog_device > > *wdev, > > clk_prepare_enable(priv->pclk); > > clk_prepare_enable(priv->osc_clk); > > > > - /* Generate Reset (WDTRSTB) Signal on parity error */ > > - rzg2l_wdt_write(priv, 0, PECR); > > + if (priv->devtype == I2C_RZG2L) { > > Same here. > > > + /* Generate Reset (WDTRSTB) Signal on parity error */ > > + rzg2l_wdt_write(priv, 0, PECR); > > + > > + /* Force parity error */ > > + rzg2l_wdt_write(priv, PEEN_FORCE, PEEN); > > + } else { > > + /* RZ/V2M doesn't have parity error registers */ > > + > > + wdev->timeout = 0; > > + > > + /* Initialize time out */ > > + rzg2l_wdt_init_timeout(wdev); > > > > - /* Force parity error */ > > - rzg2l_wdt_write(priv, PEEN_FORCE, PEEN); > > + /* Initialize watchdog counter register */ > > + rzg2l_wdt_write(priv, 0, WDTTIM); > > + > > + /* Enable watchdog timer*/ > > + rzg2l_wdt_write(priv, WDTCNT_WDTEN, WDTCNT); > > + > > + /* Wait 2 consecutive overflow cycles for reset */ > > + mdelay(DIV_ROUND_UP(2 * 0xFFFFF * 1000, priv- > > >osc_clk_rate)); > > + } > > > > return 0; > > } > > @@ -227,6 +251,8 @@ static int rzg2l_wdt_probe(struct platform_device > > *pdev) > > if (ret) > > return dev_err_probe(dev, ret, "failed to deassert"); > > > > + priv->devtype = (enum rz_wdt_type)of_device_get_match_data(dev); > > + > > pm_runtime_enable(&pdev->dev); > > > > priv->wdev.info = &rzg2l_wdt_ident; > > @@ -255,7 +281,8 @@ static int rzg2l_wdt_probe(struct platform_device > > *pdev) } > > > > static const struct of_device_id rzg2l_wdt_ids[] = { > > - { .compatible = "renesas,rzg2l-wdt", }, > > + { .compatible = "renesas,rzg2l-wdt", .data = (void *)I2C_RZG2L }, > > + { .compatible = "renesas,rzv2m-wdt", .data = (void *)I2C_RZV2M }, > > Same here. > > Cheers, > Biju > > > { /* sentinel */ } > > }; > > MODULE_DEVICE_TABLE(of, rzg2l_wdt_ids); > > -- > > 2.34.1
diff --git a/drivers/watchdog/rzg2l_wdt.c b/drivers/watchdog/rzg2l_wdt.c index 6eea0ee4af49..70cbd9ba01fe 100644 --- a/drivers/watchdog/rzg2l_wdt.c +++ b/drivers/watchdog/rzg2l_wdt.c @@ -10,7 +10,7 @@ #include <linux/io.h> #include <linux/kernel.h> #include <linux/module.h> -#include <linux/of.h> +#include <linux/of_device.h> #include <linux/platform_device.h> #include <linux/pm_runtime.h> #include <linux/reset.h> @@ -40,6 +40,11 @@ module_param(nowayout, bool, 0); MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")"); +enum rz_wdt_type { + I2C_RZG2L, + I2C_RZV2M, +}; + struct rzg2l_wdt_priv { void __iomem *base; struct watchdog_device wdev; @@ -48,6 +53,7 @@ struct rzg2l_wdt_priv { unsigned long delay; struct clk *pclk; struct clk *osc_clk; + enum rz_wdt_type devtype; }; static void rzg2l_wdt_wait_delay(struct rzg2l_wdt_priv *priv) @@ -142,11 +148,29 @@ static int rzg2l_wdt_restart(struct watchdog_device *wdev, clk_prepare_enable(priv->pclk); clk_prepare_enable(priv->osc_clk); - /* Generate Reset (WDTRSTB) Signal on parity error */ - rzg2l_wdt_write(priv, 0, PECR); + if (priv->devtype == I2C_RZG2L) { + /* Generate Reset (WDTRSTB) Signal on parity error */ + rzg2l_wdt_write(priv, 0, PECR); + + /* Force parity error */ + rzg2l_wdt_write(priv, PEEN_FORCE, PEEN); + } else { + /* RZ/V2M doesn't have parity error registers */ + + wdev->timeout = 0; + + /* Initialize time out */ + rzg2l_wdt_init_timeout(wdev); - /* Force parity error */ - rzg2l_wdt_write(priv, PEEN_FORCE, PEEN); + /* Initialize watchdog counter register */ + rzg2l_wdt_write(priv, 0, WDTTIM); + + /* Enable watchdog timer*/ + rzg2l_wdt_write(priv, WDTCNT_WDTEN, WDTCNT); + + /* Wait 2 consecutive overflow cycles for reset */ + mdelay(DIV_ROUND_UP(2 * 0xFFFFF * 1000, priv->osc_clk_rate)); + } return 0; } @@ -227,6 +251,8 @@ static int rzg2l_wdt_probe(struct platform_device *pdev) if (ret) return dev_err_probe(dev, ret, "failed to deassert"); + priv->devtype = (enum rz_wdt_type)of_device_get_match_data(dev); + pm_runtime_enable(&pdev->dev); priv->wdev.info = &rzg2l_wdt_ident; @@ -255,7 +281,8 @@ static int rzg2l_wdt_probe(struct platform_device *pdev) } static const struct of_device_id rzg2l_wdt_ids[] = { - { .compatible = "renesas,rzg2l-wdt", }, + { .compatible = "renesas,rzg2l-wdt", .data = (void *)I2C_RZG2L }, + { .compatible = "renesas,rzv2m-wdt", .data = (void *)I2C_RZV2M }, { /* sentinel */ } }; MODULE_DEVICE_TABLE(of, rzg2l_wdt_ids);