| Message ID | 20220806141059.2498226-5-vladimir.oltean@nxp.com (mailing list archive) |
|---|---|
| State | Superseded |
| Delegated to: | Geert Uytterhoeven |
| Headers | show |
| Series | Validate OF nodes for DSA shared ports | expand |
On Sat, 06 Aug 2022 17:10:53 +0300, Vladimir Oltean wrote: > The ksz_switch_chips[] element for KSZ9477 says that port 5 is an xMII > port and it supports speeds of 10/100/1000. The device tree example does > declare a fixed-link at 1000, and RGMII is the only one of those modes > that supports this speed, so use this phy-mode. > > The microchip,ksz8565 compatible string is not supported by the > microchip driver, however on Microchip's product page it says that there > are 5 ports, 4 of which have internal PHYs and the 5th is an > MII/RMII/RGMII port. It's a bit strange that this is port@6, but it is > probably just the way it is. Select an RGMII phy-mode for this one as > well. > > Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> > --- > v2->v3: patch is new > > Documentation/devicetree/bindings/net/dsa/microchip,ksz.yaml | 4 ++++ > 1 file changed, 4 insertions(+) > Acked-by: Rob Herring <robh@kernel.org>
diff --git a/Documentation/devicetree/bindings/net/dsa/microchip,ksz.yaml b/Documentation/devicetree/bindings/net/dsa/microchip,ksz.yaml index 6bbd8145b6c1..456802affc9d 100644 --- a/Documentation/devicetree/bindings/net/dsa/microchip,ksz.yaml +++ b/Documentation/devicetree/bindings/net/dsa/microchip,ksz.yaml @@ -109,6 +109,8 @@ examples: reg = <5>; label = "cpu"; ethernet = <ð0>; + phy-mode = "rgmii"; + fixed-link { speed = <1000>; full-duplex; @@ -146,6 +148,8 @@ examples: reg = <6>; label = "cpu"; ethernet = <ð0>; + phy-mode = "rgmii"; + fixed-link { speed = <1000>; full-duplex;
The ksz_switch_chips[] element for KSZ9477 says that port 5 is an xMII port and it supports speeds of 10/100/1000. The device tree example does declare a fixed-link at 1000, and RGMII is the only one of those modes that supports this speed, so use this phy-mode. The microchip,ksz8565 compatible string is not supported by the microchip driver, however on Microchip's product page it says that there are 5 ports, 4 of which have internal PHYs and the 5th is an MII/RMII/RGMII port. It's a bit strange that this is port@6, but it is probably just the way it is. Select an RGMII phy-mode for this one as well. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> --- v2->v3: patch is new Documentation/devicetree/bindings/net/dsa/microchip,ksz.yaml | 4 ++++ 1 file changed, 4 insertions(+)