From patchwork Fri Oct 28 16:59:16 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Lad, Prabhakar" X-Patchwork-Id: 13024087 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 88269ECAAA1 for ; Fri, 28 Oct 2022 17:00:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230501AbiJ1RAH (ORCPT ); Fri, 28 Oct 2022 13:00:07 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43250 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230450AbiJ1Q75 (ORCPT ); Fri, 28 Oct 2022 12:59:57 -0400 Received: from mail-wr1-x433.google.com (mail-wr1-x433.google.com [IPv6:2a00:1450:4864:20::433]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 70DC6DF2B; Fri, 28 Oct 2022 09:59:34 -0700 (PDT) Received: by mail-wr1-x433.google.com with SMTP id bk15so7375664wrb.13; Fri, 28 Oct 2022 09:59:34 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=s2faLQwm60FIW0toXle/b/I/Kg1QLaRnJK5/efYQgUQ=; b=mUHskhk/+kptO7vf7dtbknF4GguKne5ReUOG951HWBB8Nsxp2aqV8MDQNgsmGiR52E gcXnNF+2EZehSF9RLcEMz+8whS3F8lyRFeGxHcK1Fsi66C5hYFb6fvs+On0glS9FpuB6 MxH/13MnbmUT1NfzYKE4H5FlAS/oqaFxy+GCfRCrsm0/LZkz52v7Q5C4Z5cbJi29VPx+ 0dhPe6341MzHwtAiAZjUvUdLMi3kJZYlv6qNBQTiXi2+YKHyQC75ZNHkFuePSehvxGGH Anrz3xn9A8NltaVPLX+QpHtfWrrgiMMR7hgHVTIbU+Rtic9Ad87EFkFN1r9o2/l0YCI5 jJVw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=s2faLQwm60FIW0toXle/b/I/Kg1QLaRnJK5/efYQgUQ=; b=lX6+VHi/5jTQrGhmJVJd7HJxQzbeY/FJgFKyHWM8BRXwcinGfFXHlo6J7/0GFwRujM irNIazHTq9aQtnGT2rmoodH4jShdiFJgFLdmtympWYKpy/nZS9+XDY4Y3PSMfxRtMFmK EBg75sGzlrvsVO8Gd0Mt/HzR653ekDvt1POpayyP1LfE7inrgrRVlm9Jw8wOQR0t9jZG QVx65kmsCQLAYYZLqOuQBqt2+/R65gsdCZS5ifvCUFtxJcRjnLpI4YRhTiEYhkuLrLMo ymo0ysSYeRIgzvrcCWCcngLYfdTSGQwk8CzphcTRWlkIg/Tue/m7axHwuSDxY/hJgpNA 40pw== X-Gm-Message-State: ACrzQf1zvedXSsN9SCWaa7i/g7OdlFIS9Arg7Os011n9z9cc56LHSkVY l0cTz6gcXR0gu5w+F96jtdY= X-Google-Smtp-Source: AMsMyM7CC1AUvx0qZrPxkaEOBsaPe9FrMvFnvaaCKY9Uma8oYLgdhitk09PvFAVPyJtPLYrNV3tu7g== X-Received: by 2002:a5d:6da9:0:b0:22e:53bd:31c1 with SMTP id u9-20020a5d6da9000000b0022e53bd31c1mr211356wrs.358.1666976372812; Fri, 28 Oct 2022 09:59:32 -0700 (PDT) Received: from prasmi.home ([2a00:23c8:2501:c701:d53b:eaf9:15f:6a8a]) by smtp.gmail.com with ESMTPSA id h2-20020adfe982000000b002322bff5b3bsm4939689wrm.54.2022.10.28.09.59.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 28 Oct 2022 09:59:32 -0700 (PDT) From: Prabhakar X-Google-Original-From: Prabhakar To: Paul Walmsley , Palmer Dabbelt , Albert Ou , Geert Uytterhoeven , Magnus Damm Cc: Rob Herring , Krzysztof Kozlowski , Heiko Stuebner , Conor Dooley , Guo Ren , Anup Patel , Atish Patra , Heinrich Schuchardt , devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, Prabhakar , Biju Das , Lad Prabhakar , Krzysztof Kozlowski Subject: [PATCH v5 2/7] dt-bindings: riscv: Add Andes AX45MP core to the list Date: Fri, 28 Oct 2022 17:59:16 +0100 Message-Id: <20221028165921.94487-3-prabhakar.mahadev-lad.rj@bp.renesas.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221028165921.94487-1-prabhakar.mahadev-lad.rj@bp.renesas.com> References: <20221028165921.94487-1-prabhakar.mahadev-lad.rj@bp.renesas.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org From: Lad Prabhakar The Renesas RZ/Five microprocessor includes a RISC-V CPU Core (AX45MP Single) from Andes. In preparation to add support for RZ/Five SoC add the Andes AX45MP core to the list. More details about Andes AX45MP core can be found here: [0] http://www.andestech.com/en/products-solutions/andescore-processors/riscv-ax45mp/ Signed-off-by: Lad Prabhakar Acked-by: Krzysztof Kozlowski Reviewed-by: Geert Uytterhoeven Reviewed-by: Conor Dooley Reviewed-by: Guo Ren --- v4 -> v5 * Included RB tag from Conor v3 -> v4 * No change v2 -> v3 * Included RB tag from Geert v1 -> v2 * Included ack from Krzysztof --- Documentation/devicetree/bindings/riscv/cpus.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/riscv/cpus.yaml b/Documentation/devicetree/bindings/riscv/cpus.yaml index ae7963e99225..2bf91829c8de 100644 --- a/Documentation/devicetree/bindings/riscv/cpus.yaml +++ b/Documentation/devicetree/bindings/riscv/cpus.yaml @@ -28,6 +28,7 @@ properties: oneOf: - items: - enum: + - andestech,ax45mp - canaan,k210 - sifive,bullet0 - sifive,e5