| Message ID | 20230529081028.1156577-1-yoshihiro.shimoda.uh@renesas.com (mailing list archive) |
|---|---|
| State | Rejected |
| Delegated to: | Geert Uytterhoeven |
| Headers | show |
| Series | arm64: dts: renesas: r8a779f0: Update clocks of rswitch node | expand |
diff --git a/arch/arm64/boot/dts/renesas/r8a779f0.dtsi b/arch/arm64/boot/dts/renesas/r8a779f0.dtsi index 1d5426e6293c..2cb69d2ce956 100644 --- a/arch/arm64/boot/dts/renesas/r8a779f0.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a779f0.dtsi @@ -799,7 +799,8 @@ rswitch: ethernet@e6880000 { "rmac2_mdio", "rmac0_phy", "rmac1_phy", "rmac2_phy"; - clocks = <&cpg CPG_MOD 1505>; + clocks = <&cpg CPG_MOD 1505>, <&cpg CPG_CORE R8A779F0_CLK_S0D2_HSC>; + clock-names = "fck", "aclk"; power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>; resets = <&cpg 1505>; status = "disabled";
To add ACLK into the clocks and clock-names properties of rswitch node. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> --- arch/arm64/boot/dts/renesas/r8a779f0.dtsi | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)