| Message ID | 20230828041434.2747699-3-yoshihiro.shimoda.uh@renesas.com (mailing list archive) |
|---|---|
| State | Superseded |
| Delegated to: | Geert Uytterhoeven |
| Headers | show |
| Series | arm64: dts: renesas: r8a779f0: Add PCIe support | expand |
Hi Shimoda-san, On Mon, Aug 28, 2023 at 6:14 AM Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> wrote: > Enable PCIe Host controller channel 0 on R-Car S4-8 Spider board. > > Since this board has an Oculink connector, CLKREQ# pin of PFC for PCIe > should not be used. So, using a GPIO is used to output the clock instead. > Otherwise the controller cannot detect a PCIe device. > > Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Thanks for your patch! > --- a/arch/arm64/boot/dts/renesas/r8a779f0-spider-cpu.dtsi > +++ b/arch/arm64/boot/dts/renesas/r8a779f0-spider-cpu.dtsi > @@ -145,6 +157,11 @@ &mmc0 { > status = "okay"; > }; > > +&pciec0 { > + reset-gpio = <&gpio_exp_20 0 GPIO_ACTIVE_LOW>; > + status = "okay"; > +}; > + > &pfc { > pinctrl-0 = <&scif_clk_pins>; > pinctrl-names = "default"; > @@ -202,6 +219,13 @@ &ufs { > status = "okay"; > }; > > +&pcie0_clkref { Please move this node up to preserve alphabetical sort order. > + compatible = "gpio-gate-clock"; > + clocks = <&rc21012_pci>; > + enable-gpios = <&gpio2 15 GPIO_ACTIVE_LOW>; > + /delete-property/ clock-frequency; > +}; > + > &ufs30_clk { > compatible = "gpio-gate-clock"; > clocks = <&rc21012_ufs>; The rest LGTM. Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
diff --git a/arch/arm64/boot/dts/renesas/r8a779f0-spider-cpu.dtsi b/arch/arm64/boot/dts/renesas/r8a779f0-spider-cpu.dtsi index 76a94812875e..48fb79aac32f 100644 --- a/arch/arm64/boot/dts/renesas/r8a779f0-spider-cpu.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a779f0-spider-cpu.dtsi @@ -53,6 +53,12 @@ memory@480000000 { reg = <0x4 0x80000000 0x0 0x80000000>; }; + rc21012_pci: clk-rc21012-pci { + compatible = "fixed-clock"; + clock-frequency = <100000000>; + #clock-cells = <0>; + }; + rc21012_ufs: clk-rc21012-ufs { compatible = "fixed-clock"; clock-frequency = <38400000>; @@ -106,6 +112,12 @@ gpio_exp_20: gpio@20 { reg = <0x20>; gpio-controller; #gpio-cells = <2>; + + rc21012-gpio2-hog { + gpio-hog; + gpios = <5 GPIO_ACTIVE_LOW>; + output-high; + }; }; }; @@ -145,6 +157,11 @@ &mmc0 { status = "okay"; }; +&pciec0 { + reset-gpio = <&gpio_exp_20 0 GPIO_ACTIVE_LOW>; + status = "okay"; +}; + &pfc { pinctrl-0 = <&scif_clk_pins>; pinctrl-names = "default"; @@ -202,6 +219,13 @@ &ufs { status = "okay"; }; +&pcie0_clkref { + compatible = "gpio-gate-clock"; + clocks = <&rc21012_pci>; + enable-gpios = <&gpio2 15 GPIO_ACTIVE_LOW>; + /delete-property/ clock-frequency; +}; + &ufs30_clk { compatible = "gpio-gate-clock"; clocks = <&rc21012_ufs>;
Enable PCIe Host controller channel 0 on R-Car S4-8 Spider board. Since this board has an Oculink connector, CLKREQ# pin of PFC for PCIe should not be used. So, using a GPIO is used to output the clock instead. Otherwise the controller cannot detect a PCIe device. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> --- .../boot/dts/renesas/r8a779f0-spider-cpu.dtsi | 24 +++++++++++++++++++ 1 file changed, 24 insertions(+)