From patchwork Fri Sep 1 07:59:30 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Biju Das X-Patchwork-Id: 13372173 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 626A9CA0FE6 for ; Fri, 1 Sep 2023 07:59:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1345076AbjIAH7r (ORCPT ); Fri, 1 Sep 2023 03:59:47 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57800 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233430AbjIAH7q (ORCPT ); Fri, 1 Sep 2023 03:59:46 -0400 Received: from relmlie5.idc.renesas.com (relmlor1.renesas.com [210.160.252.171]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 091BF10D7; Fri, 1 Sep 2023 00:59:43 -0700 (PDT) X-IronPort-AV: E=Sophos;i="6.02,219,1688396400"; d="scan'208";a="174709492" Received: from unknown (HELO relmlir6.idc.renesas.com) ([10.200.68.152]) by relmlie5.idc.renesas.com with ESMTP; 01 Sep 2023 16:59:43 +0900 Received: from localhost.localdomain (unknown [10.226.92.203]) by relmlir6.idc.renesas.com (Postfix) with ESMTP id 5E98541B65DD; Fri, 1 Sep 2023 16:59:39 +0900 (JST) From: Biju Das To: Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Biju Das , Geert Uytterhoeven , Magnus Damm , Paul Walmsley , Palmer Dabbelt , Albert Ou , linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, Prabhakar Mahadev Lad Subject: [PATCH v3 1/3] arm64: dts: renesas: rzg2ul-smarc-som: Enable serial NOR flash Date: Fri, 1 Sep 2023 08:59:30 +0100 Message-Id: <20230901075932.105822-2-biju.das.jz@bp.renesas.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230901075932.105822-1-biju.das.jz@bp.renesas.com> References: <20230901075932.105822-1-biju.das.jz@bp.renesas.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org Enable Renesas at25ql128a flash connected to QSPI0. Also disable the node from rzfive-smarc-som as it is untested. Signed-off-by: Biju Das Reviewed-by: Geert Uytterhoeven --- v2->v3: * Dropped subnodes, as all pins use the same power-source value. v1->v2: * Enabled 4-bit tx support --- .../boot/dts/renesas/rzg2ul-smarc-som.dtsi | 38 +++++++++++++++++++ .../boot/dts/renesas/rzfive-smarc-som.dtsi | 4 ++ 2 files changed, 42 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/rzg2ul-smarc-som.dtsi b/arch/arm64/boot/dts/renesas/rzg2ul-smarc-som.dtsi index 97cdad2a12e2..e28c1e3d5315 100644 --- a/arch/arm64/boot/dts/renesas/rzg2ul-smarc-som.dtsi +++ b/arch/arm64/boot/dts/renesas/rzg2ul-smarc-som.dtsi @@ -179,6 +179,12 @@ eth1_pins: eth1 { ; /* IRQ7 */ }; + qspi0_pins: qspi0 { + pins = "QSPI0_IO0", "QSPI0_IO1", "QSPI0_IO2", "QSPI0_IO3", + "QSPI0_SPCLK", "QSPI0_SSL"; + power-source = <1800>; + }; + sdhi0_emmc_pins: sd0emmc { sd0_emmc_data { pins = "SD0_DATA0", "SD0_DATA1", "SD0_DATA2", "SD0_DATA3", @@ -230,6 +236,38 @@ sd0_mux_uhs { }; }; +&sbc { + pinctrl-0 = <&qspi0_pins>; + pinctrl-names = "default"; + status = "okay"; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <50000000>; + spi-tx-bus-width = <4>; + spi-rx-bus-width = <4>; + + spi-cpol; + spi-cpha; + m25p,fast-read; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + boot@0 { + reg = <0x00000000 0x200000>; + read-only; + }; + user@200000 { + reg = <0x200000 0xE00000>; + }; + }; + }; +}; + #if (SW_SW0_DEV_SEL) &sdhi0 { pinctrl-0 = <&sdhi0_emmc_pins>; diff --git a/arch/riscv/boot/dts/renesas/rzfive-smarc-som.dtsi b/arch/riscv/boot/dts/renesas/rzfive-smarc-som.dtsi index c62debc7ca7e..0c9d72c32879 100644 --- a/arch/riscv/boot/dts/renesas/rzfive-smarc-som.dtsi +++ b/arch/riscv/boot/dts/renesas/rzfive-smarc-som.dtsi @@ -42,6 +42,10 @@ phy1: ethernet-phy@7 { }; }; +&sbc { + status = "disabled"; +}; + &sdhi0 { status = "disabled"; };