Message ID | 20230912045157.177966-30-claudiu.beznea.uj@bp.renesas.com (mailing list archive) |
---|---|
State | Superseded |
Delegated to: | Geert Uytterhoeven |
Headers | show |
Series | Add new Renesas RZ/G3S SoC and RZ/G3S SMARC EVK | expand |
On Tue, Sep 12, 2023 at 07:51:49AM +0300, Claudiu wrote: > From: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> > > Add documentation for pin controller found on RZ/G3S (R9A08G045) SoC. > Compared with RZ/G2{L,UL} RZ/G3S has 82 general-purpose IOs, no slew > rate and output impedance support and more values for drive strength > which needs to be expressed in microamp. > > Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> > --- > .../pinctrl/renesas,rzg2l-pinctrl.yaml | 26 +++++++++++++++---- > 1 file changed, 21 insertions(+), 5 deletions(-) > > diff --git a/Documentation/devicetree/bindings/pinctrl/renesas,rzg2l-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/renesas,rzg2l-pinctrl.yaml > index 145c5442f268..079e5be69330 100644 > --- a/Documentation/devicetree/bindings/pinctrl/renesas,rzg2l-pinctrl.yaml > +++ b/Documentation/devicetree/bindings/pinctrl/renesas,rzg2l-pinctrl.yaml > @@ -25,6 +25,7 @@ properties: > - enum: > - renesas,r9a07g043-pinctrl # RZ/G2UL{Type-1,Type-2} and RZ/Five > - renesas,r9a07g044-pinctrl # RZ/G2{L,LC} > + - renesas,r9a08g045-pinctrl # RZ/G3S > > - items: > - enum: > @@ -77,6 +78,26 @@ additionalProperties: > - $ref: pincfg-node.yaml# > - $ref: pinmux-node.yaml# > > + - if: > + properties: > + compatible: > + contains: > + enum: > + - renesas,r9a08g045-pinctrl > + then: > + properties: > + drive-strength-microamp: > + enum: [ 1900, 2200, 4000, 4400, 4500, 4700, 5200, 5300, 5700, > + 5800, 6000, 6050, 6100, 6550, 6800, 7000, 8000, 9000, > + 10000 ] > + else: > + properties: > + drive-strength: > + enum: [ 2, 4, 8, 12 ] > + output-impedance-ohms: > + enum: [ 33, 50, 66, 100 ] > + slew-rate: true > + > description: > Pin controller client devices use pin configuration subnodes (children > and grandchildren) for desired pin configuration. > @@ -89,14 +110,9 @@ additionalProperties: > alternate function configuration number using the RZG2L_PORT_PINMUX() > helper macro in <dt-bindings/pinctrl/rzg2l-pinctrl.h>. > pins: true > - drive-strength: > - enum: [ 2, 4, 8, 12 ] > - output-impedance-ohms: > - enum: [ 33, 50, 66, 100 ] Removing these entries will break things. Except that this binding is missing 'additionalProperties: false' at this level. That should be fixed first. I would suggest you keep these here and make the if/then schema just not allow properties (e.g. "drive-strength-microamp: false"). > power-source: > description: I/O voltage in millivolt. > enum: [ 1800, 2500, 3300 ] > - slew-rate: true > gpio-hog: true > gpios: true > input-enable: true > -- > 2.39.2 >
Hi Claudiu, On Tue, Sep 12, 2023 at 6:53 AM Claudiu <claudiu.beznea@tuxon.dev> wrote: > From: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> > > Add documentation for pin controller found on RZ/G3S (R9A08G045) SoC. > Compared with RZ/G2{L,UL} RZ/G3S has 82 general-purpose IOs, no slew > rate and output impedance support and more values for drive strength > which needs to be expressed in microamp. > > Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Thanks for your patch! LGTM, once you have taken Rob's comments into account. Gr{oetje,eeting}s, Geert
diff --git a/Documentation/devicetree/bindings/pinctrl/renesas,rzg2l-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/renesas,rzg2l-pinctrl.yaml index 145c5442f268..079e5be69330 100644 --- a/Documentation/devicetree/bindings/pinctrl/renesas,rzg2l-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/renesas,rzg2l-pinctrl.yaml @@ -25,6 +25,7 @@ properties: - enum: - renesas,r9a07g043-pinctrl # RZ/G2UL{Type-1,Type-2} and RZ/Five - renesas,r9a07g044-pinctrl # RZ/G2{L,LC} + - renesas,r9a08g045-pinctrl # RZ/G3S - items: - enum: @@ -77,6 +78,26 @@ additionalProperties: - $ref: pincfg-node.yaml# - $ref: pinmux-node.yaml# + - if: + properties: + compatible: + contains: + enum: + - renesas,r9a08g045-pinctrl + then: + properties: + drive-strength-microamp: + enum: [ 1900, 2200, 4000, 4400, 4500, 4700, 5200, 5300, 5700, + 5800, 6000, 6050, 6100, 6550, 6800, 7000, 8000, 9000, + 10000 ] + else: + properties: + drive-strength: + enum: [ 2, 4, 8, 12 ] + output-impedance-ohms: + enum: [ 33, 50, 66, 100 ] + slew-rate: true + description: Pin controller client devices use pin configuration subnodes (children and grandchildren) for desired pin configuration. @@ -89,14 +110,9 @@ additionalProperties: alternate function configuration number using the RZG2L_PORT_PINMUX() helper macro in <dt-bindings/pinctrl/rzg2l-pinctrl.h>. pins: true - drive-strength: - enum: [ 2, 4, 8, 12 ] - output-impedance-ohms: - enum: [ 33, 50, 66, 100 ] power-source: description: I/O voltage in millivolt. enum: [ 1800, 2500, 3300 ] - slew-rate: true gpio-hog: true gpios: true input-enable: true