Message ID | 20231120070024.4079344-13-claudiu.beznea.uj@bp.renesas.com (mailing list archive) |
---|---|
State | Superseded |
Delegated to: | Geert Uytterhoeven |
Headers | show |
Series | renesas: rzg3s: Add support for Ethernet | expand |
On 11/20/23 10:00 AM, Claudiu wrote: > From: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> > > Add switch OFF/OFF description to values of SW_SD0_DEV_SEL for OFF/ON probably? > better understanding. > > Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> [...] MBR, Sergey
Hi Claudiu, On Mon, Nov 20, 2023 at 8:03 AM Claudiu <claudiu.beznea@tuxon.dev> wrote: > From: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> > > Add switch OFF/OFF description to values of SW_SD0_DEV_SEL for > better understanding. > > Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Thanks for your patch! > --- a/arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi > +++ b/arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi > @@ -11,8 +11,8 @@ > /* > * Signals of SW_CONFIG switches: > * @SW_SD0_DEV_SEL: > - * 0 - SD0 is connected to eMMC > - * 1 - SD0 is connected to uSD0 card > + * 0 - (switch OFF) SD0 is connected to eMMC > + * 1 - (switch ON) SD0 is connected to uSD0 card > * @SW_SD2_EN: > * 0 - (switch OFF) SD2 is connected to SoC > * 1 - (switch ON) SCIF1, SSI0, IRQ0, IRQ1 connected to SoC I guess this makes sense Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Gr{oetje,eeting}s, Geert
diff --git a/arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi b/arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi index 275b14acd2ee..e090a4837468 100644 --- a/arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi +++ b/arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi @@ -11,8 +11,8 @@ /* * Signals of SW_CONFIG switches: * @SW_SD0_DEV_SEL: - * 0 - SD0 is connected to eMMC - * 1 - SD0 is connected to uSD0 card + * 0 - (switch OFF) SD0 is connected to eMMC + * 1 - (switch ON) SD0 is connected to uSD0 card * @SW_SD2_EN: * 0 - (switch OFF) SD2 is connected to SoC * 1 - (switch ON) SCIF1, SSI0, IRQ0, IRQ1 connected to SoC