| Message ID | 20231122121235.827122-13-peterlin@andestech.com (mailing list archive) |
|---|---|
| State | Superseded |
| Delegated to: | Geert Uytterhoeven |
| Headers | show |
| Series | Support Andes PMU extension | expand |
On Wed, Nov 22, 2023 at 1:17 PM Yu Chien Peter Lin <peterlin@andestech.com> wrote: > xandespmu stands for Andes Performance Monitor Unit extension. > Based on the added Andes PMU ISA string, the SBI PMU driver > will make use of the non-standard irq source. > > Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Gr{oetje,eeting}s, Geert
On Wed, Nov 22, 2023 at 12:19 PM Yu Chien Peter Lin <peterlin@andestech.com> wrote: > > xandespmu stands for Andes Performance Monitor Unit extension. > Based on the added Andes PMU ISA string, the SBI PMU driver > will make use of the non-standard irq source. > > Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com> > --- > Changes v1 -> v2: > - New patch > Changes v2 -> v3: > - No change > Changes v3 -> v4: > - No change > --- > arch/riscv/boot/dts/renesas/r9a07g043f.dtsi | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Tested-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Cheers, Prabhakar > diff --git a/arch/riscv/boot/dts/renesas/r9a07g043f.dtsi b/arch/riscv/boot/dts/renesas/r9a07g043f.dtsi > index 78072e80793d..5f2f2181638a 100644 > --- a/arch/riscv/boot/dts/renesas/r9a07g043f.dtsi > +++ b/arch/riscv/boot/dts/renesas/r9a07g043f.dtsi > @@ -26,7 +26,7 @@ cpu0: cpu@0 { > riscv,isa = "rv64imafdc"; > riscv,isa-base = "rv64i"; > riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zicntr", "zicsr", > - "zifencei", "zihpm"; > + "zifencei", "zihpm", "xandespmu"; > mmu-type = "riscv,sv39"; > i-cache-size = <0x8000>; > i-cache-line-size = <0x40>; > -- > 2.34.1 > >
diff --git a/arch/riscv/boot/dts/renesas/r9a07g043f.dtsi b/arch/riscv/boot/dts/renesas/r9a07g043f.dtsi index 78072e80793d..5f2f2181638a 100644 --- a/arch/riscv/boot/dts/renesas/r9a07g043f.dtsi +++ b/arch/riscv/boot/dts/renesas/r9a07g043f.dtsi @@ -26,7 +26,7 @@ cpu0: cpu@0 { riscv,isa = "rv64imafdc"; riscv,isa-base = "rv64i"; riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zicntr", "zicsr", - "zifencei", "zihpm"; + "zifencei", "zihpm", "xandespmu"; mmu-type = "riscv,sv39"; i-cache-size = <0x8000>; i-cache-line-size = <0x40>;
xandespmu stands for Andes Performance Monitor Unit extension. Based on the added Andes PMU ISA string, the SBI PMU driver will make use of the non-standard irq source. Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com> --- Changes v1 -> v2: - New patch Changes v2 -> v3: - No change Changes v3 -> v4: - No change --- arch/riscv/boot/dts/renesas/r9a07g043f.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)