From patchwork Mon Dec 4 15:56:34 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 13478721 X-Patchwork-Delegate: geert@linux-m68k.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="FX/2i/Ez" Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.12]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0D028B0; Mon, 4 Dec 2023 08:02:27 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1701705748; x=1733241748; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=GcznTEzkYh7381dOAmLl/g2Ovk3HvI9vfBlGPtxsvN8=; b=FX/2i/Ez9IbgsV8Yf5CSEMiC7/34GX7vzuVhkCNJcdqPIK/in3QnCzh8 +JEjSsYh5Axz1NJovaBYo0IFzi9qEFZQiL+r+rS00fSBmH0sId1TFQ7xV 5vnLffRXvnt4Epki25rUGKOa6DN63xMYnyz4ShVZvLE/dmtlA+eZLjb75 gL0aJ0w+IPSPMreEKV/S968+YQQOb0QIbL+EUe55qiDHRRDRmiv8bBZxv KTqDFtEtB/oWgS4cZcn9Z18gQd1aNOrQTZ3W7pFlIj6m4OjKHnj7/m7Ol sn7ICVU2oCzVTrTY28kybGW6jt6PCAXs7/pJR5s9o0is3ZtT8ZDgU3WiQ Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10914"; a="807882" X-IronPort-AV: E=Sophos;i="6.04,250,1695711600"; d="scan'208";a="807882" Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by orvoesa104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Dec 2023 08:00:48 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10914"; a="774297204" X-IronPort-AV: E=Sophos;i="6.04,250,1695711600"; d="scan'208";a="774297204" Received: from black.fi.intel.com ([10.237.72.28]) by fmsmga007.fm.intel.com with ESMTP; 04 Dec 2023 08:00:44 -0800 Received: by black.fi.intel.com (Postfix, from userid 1003) id 1DF2FA02; Mon, 4 Dec 2023 18:00:43 +0200 (EET) From: Andy Shevchenko To: Linus Walleij , Andy Shevchenko , =?utf-8?q?Jonathan_Neu?= =?utf-8?q?sch=C3=A4fer?= , Geert Uytterhoeven , Claudiu Beznea , linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, openbmc@lists.ozlabs.org, linux-renesas-soc@vger.kernel.org Cc: Lakshmi Sowjanya D Subject: [PATCH v1 3/5] pinctrl: equilibrium: Convert to use struct pingroup Date: Mon, 4 Dec 2023 17:56:34 +0200 Message-ID: <20231204160033.1872569-4-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.43.0.rc1.1.gbec44491f096 In-Reply-To: <20231204160033.1872569-1-andriy.shevchenko@linux.intel.com> References: <20231204160033.1872569-1-andriy.shevchenko@linux.intel.com> Precedence: bulk X-Mailing-List: linux-renesas-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The pin control header provides struct pingroup. Utilize it instead of open coded variants in the driver. Signed-off-by: Andy Shevchenko --- drivers/pinctrl/pinctrl-equilibrium.c | 26 +++++++++++++------------- 1 file changed, 13 insertions(+), 13 deletions(-) diff --git a/drivers/pinctrl/pinctrl-equilibrium.c b/drivers/pinctrl/pinctrl-equilibrium.c index fd59cfdeefac..4ebae516d1b1 100644 --- a/drivers/pinctrl/pinctrl-equilibrium.c +++ b/drivers/pinctrl/pinctrl-equilibrium.c @@ -705,7 +705,7 @@ static int eqbr_build_groups(struct eqbr_pinctrl_drv_data *drvdata) struct device *dev = drvdata->dev; struct device_node *node = dev->of_node; unsigned int *pins, *pinmux, pin_id, pinmux_id; - struct group_desc group; + struct pingroup group, *grp = &group; struct device_node *np; struct property *prop; int j, err; @@ -721,49 +721,49 @@ static int eqbr_build_groups(struct eqbr_pinctrl_drv_data *drvdata) of_node_put(np); return err; } - group.num_pins = err; - group.name = prop->value; - pins = devm_kcalloc(dev, group.num_pins, sizeof(*pins), GFP_KERNEL); + grp->npins = err; + grp->name = prop->value; + pins = devm_kcalloc(dev, grp->npins, sizeof(*pins), GFP_KERNEL); if (!pins) { of_node_put(np); return -ENOMEM; } - group.pins = pins; + grp->pins = pins; - pinmux = devm_kcalloc(dev, group.num_pins, sizeof(*pinmux), GFP_KERNEL); + pinmux = devm_kcalloc(dev, grp->npins, sizeof(*pinmux), GFP_KERNEL); if (!pinmux) { of_node_put(np); return -ENOMEM; } - for (j = 0; j < group.num_pins; j++) { + for (j = 0; j < grp->npins; j++) { if (of_property_read_u32_index(np, "pins", j, &pin_id)) { dev_err(dev, "Group %s: Read intel pins id failed\n", - group.name); + grp->name); of_node_put(np); return -EINVAL; } if (pin_id >= drvdata->pctl_desc.npins) { dev_err(dev, "Group %s: Invalid pin ID, idx: %d, pin %u\n", - group.name, j, pin_id); + grp->name, j, pin_id); of_node_put(np); return -EINVAL; } pins[j] = pin_id; if (of_property_read_u32_index(np, "pinmux", j, &pinmux_id)) { dev_err(dev, "Group %s: Read intel pinmux id failed\n", - group.name); + grp->name); of_node_put(np); return -EINVAL; } pinmux[j] = pinmux_id; } - err = pinctrl_generic_add_group(drvdata->pctl_dev, group.name, - group.pins, group.num_pins, + err = pinctrl_generic_add_group(drvdata->pctl_dev, + grp->name, grp->pins, grp->npins, pinmux); if (err < 0) { - dev_err(dev, "Failed to register group %s\n", group.name); + dev_err(dev, "Failed to register group %s\n", grp->name); of_node_put(np); return err; }