From patchwork Wed Jan 3 14:28:21 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Romain Gantois X-Patchwork-Id: 13510114 X-Patchwork-Delegate: kieran@bingham.xyz Received: from relay3-d.mail.gandi.net (relay3-d.mail.gandi.net [217.70.183.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 46F231A59D; Wed, 3 Jan 2024 14:28:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="BhhDi2i8" Received: by mail.gandi.net (Postfix) with ESMTPSA id A287E6000E; Wed, 3 Jan 2024 14:28:19 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1704292100; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=sIzE85qqMU4ljpuVTgJrBzU9sL9vWxRn1Kuat+K5IJY=; b=BhhDi2i820PKEIjVb8tsSUzcTWykZmsBGYRCPClziJp83Ljiftdi+GLvHHUsM81zoCPfvj j0jvoSHlZLHTY2rpAaQNLHxC2AwRTzO83Idszu9hHutueS3jT9xXXM6njHBCqcQulKF5pG PZUSjxuKU/17lG/oq/NfhBUmaz9N8tPwqY2DCgGZoJxJai23f5JGCsQ2MUNXlh2Dq0/SQq 0B8htGid8qvasKIwKbxUSHe8HTk4Cz+ZNcy0zYH24MzYobIyrmH8aMOIvg7NpAagQ6J96T dAPU9x6DOmeAdyVCgGs2VUmUXrHnukTSjEqX1B6kx6Wy2XxYsz06HPYb8RJBmA== From: Romain Gantois To: Alexandre Torgue , Jose Abreu , Russell King , Andrew Lunn , Jakub Kicinski , Heiner Kallweit Cc: "David S. Miller" , Eric Dumazet , Paolo Abeni , Maxime Coquelin , =?utf-8?b?Q2zDqW1lbnQgTMOpZ2Vy?= , Marek Vasut , Clark Wang , Miquel Raynal , Sylvain Girard , Pascal EBERHARD , netdev@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, linux-renesas-soc@vger.kernel.org, Romain Gantois Subject: [PATCH net 1/5] net: phy: add PHY_F_RXC_ALWAYS_ON to PHY dev flags Date: Wed, 3 Jan 2024 15:28:21 +0100 Message-ID: <20240103142827.168321-2-romain.gantois@bootlin.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240103142827.168321-1-romain.gantois@bootlin.com> References: <20240103142827.168321-1-romain.gantois@bootlin.com> Precedence: bulk X-Mailing-List: linux-renesas-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-GND-Sasl: romain.gantois@bootlin.com From: Russell King Some MAC controllers (e.g. stmmac) require their connected PHY to continuously provide a receive clock signal. This can cause issues in two cases: 1. The clock signal hasn't been started yet by the time the MAC driver initializes its hardware. This can make the initialization fail, as in the case of the rzn1 GMAC1 driver. 2. The clock signal is cut during a power saving event. By the time the MAC is brought back up, the clock signal is still not active since phylink_start hasn't been called yet. This brings us back to case 1. If a PHY driver reads this flag, it should ensure that the receive clock signal is started as soon as possible, and that it isn't brought down when the PHY goes into suspend. Signed-off-by: Russell King [rgantois: commit log] Signed-off-by: Romain Gantois --- drivers/net/phy/phylink.c | 10 +++++++++- include/linux/phy.h | 1 + include/linux/phylink.h | 4 ++++ 3 files changed, 14 insertions(+), 1 deletion(-) diff --git a/drivers/net/phy/phylink.c b/drivers/net/phy/phylink.c index 25c19496a336..f26b13d916d4 100644 --- a/drivers/net/phy/phylink.c +++ b/drivers/net/phy/phylink.c @@ -1837,6 +1837,8 @@ static int phylink_bringup_phy(struct phylink *pl, struct phy_device *phy, static int phylink_attach_phy(struct phylink *pl, struct phy_device *phy, phy_interface_t interface) { + u32 flags = 0; + if (WARN_ON(pl->cfg_link_an_mode == MLO_AN_FIXED || (pl->cfg_link_an_mode == MLO_AN_INBAND && phy_interface_mode_is_8023z(interface) && !pl->sfp_bus))) @@ -1845,7 +1847,10 @@ static int phylink_attach_phy(struct phylink *pl, struct phy_device *phy, if (pl->phydev) return -EBUSY; - return phy_attach_direct(pl->netdev, phy, 0, interface); + if (pl->config->mac_requires_rxc) + flags |= PHY_F_RXC_ALWAYS_ON; + + return phy_attach_direct(pl->netdev, phy, flags, interface); } /** @@ -1948,6 +1953,9 @@ int phylink_fwnode_phy_connect(struct phylink *pl, pl->link_config.interface = pl->link_interface; } + if (pl->config->mac_requires_rxc) + flags |= PHY_F_RXC_ALWAYS_ON; + ret = phy_attach_direct(pl->netdev, phy_dev, flags, pl->link_interface); phy_device_free(phy_dev); diff --git a/include/linux/phy.h b/include/linux/phy.h index bd285950972c..c6cb53412273 100644 --- a/include/linux/phy.h +++ b/include/linux/phy.h @@ -764,6 +764,7 @@ struct phy_device { /* Generic phy_device::dev_flags */ #define PHY_F_NO_IRQ 0x80000000 +#define PHY_F_RXC_ALWAYS_ON BIT(30) static inline struct phy_device *to_phy_device(const struct device *dev) { diff --git a/include/linux/phylink.h b/include/linux/phylink.h index 875439ab45de..8430ac7ead11 100644 --- a/include/linux/phylink.h +++ b/include/linux/phylink.h @@ -204,6 +204,9 @@ enum phylink_op_type { * @poll_fixed_state: if true, starts link_poll, * if MAC link is at %MLO_AN_FIXED mode. * @mac_managed_pm: if true, indicate the MAC driver is responsible for PHY PM. + * @mac_requires_rxc: if true, the MAC always requires a receive clock from PHY. + * The PHY driver should start the clock signal as soon as + * possible and avoid stopping it during suspend events. * @ovr_an_inband: if true, override PCS to MLO_AN_INBAND * @get_fixed_state: callback to execute to determine the fixed link state, * if MAC link is at %MLO_AN_FIXED mode. @@ -216,6 +219,7 @@ struct phylink_config { enum phylink_op_type type; bool poll_fixed_state; bool mac_managed_pm; + bool mac_requires_rxc; bool ovr_an_inband; void (*get_fixed_state)(struct phylink_config *config, struct phylink_link_state *state);