From patchwork Wed Jan 3 14:28:23 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Romain Gantois X-Patchwork-Id: 13510116 X-Patchwork-Delegate: kieran@bingham.xyz Received: from relay3-d.mail.gandi.net (relay3-d.mail.gandi.net [217.70.183.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8029B1A704; Wed, 3 Jan 2024 14:28:26 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="oB/z7ORE" Received: by mail.gandi.net (Postfix) with ESMTPSA id D156B6000C; Wed, 3 Jan 2024 14:28:23 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1704292104; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=Wp8DYMknUb7GCV6xvdPdeHPJMzkPaB2xD+HrP3VM8GM=; b=oB/z7ORENEshnW+G77deGCmY+G/XJmhFAHxDZVQxBKRiwPDd6b0sVihw/tZuLR1iR5hWVz r2xRI0DVcDyB/23d4rCbk3s1w6ZzfQMNyZXUHPXS+JyMEhaW21lBTxgSkqWvzXK+GswyYn tNyjC6NHEq4Hs0asFaZMkUYuKcam4NxRb9uhHB/UCk04pk3moUDgdBvvGuV+ciBAPd7brb EbEIPNpJI1YCw9jqMJhsw7HaoRkD/nP1E1ECTV+5guiN/Ygfgviabqi5gHKa8SHGlie8ek R8IAxuHRQAZciwGtGnm43swudWzoz8mxFVrWS/xqEdDwTmfFD4W2vhPLDEyfzw== From: Romain Gantois To: Alexandre Torgue , Jose Abreu , Russell King , Andrew Lunn , Jakub Kicinski , Heiner Kallweit Cc: "David S. Miller" , Eric Dumazet , Paolo Abeni , Maxime Coquelin , =?utf-8?b?Q2zDqW1lbnQgTMOpZ2Vy?= , Marek Vasut , Clark Wang , Miquel Raynal , Sylvain Girard , Pascal EBERHARD , netdev@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, linux-renesas-soc@vger.kernel.org, Romain Gantois Subject: [PATCH net 3/5] net: stmmac: Signal to PHY/PCS drivers to keep RX clock on Date: Wed, 3 Jan 2024 15:28:23 +0100 Message-ID: <20240103142827.168321-4-romain.gantois@bootlin.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240103142827.168321-1-romain.gantois@bootlin.com> References: <20240103142827.168321-1-romain.gantois@bootlin.com> Precedence: bulk X-Mailing-List: linux-renesas-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-GND-Sasl: romain.gantois@bootlin.com From: Russell King There is a reocurring issue with stmmac controllers where the MAC fails to initialize its hardware if an RX clock signal isn't provided on the MAC/PHY link. This causes issues when PHY or PCS devices either go into suspend while cutting the RX clock or do not bring the clock signal up early enough for the MAC to initialize successfully. Set the mac_requires_rxc flag in the stmmac phylink config so that PHY/PCS drivers know to keep the RX clock up at all times. Reported-by: Clark Wang Link: https://lore.kernel.org/all/20230202081559.3553637-1-xiaoning.wang@nxp.com/ Reported-by: Clément Léger Link: https://lore.kernel.org/linux-arm-kernel/20230116103926.276869-4-clement.leger@bootlin.com/ Signed-off-by: Russell King [rgantois: commit log] Signed-off-by: Romain Gantois --- drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c index 37e64283f910..ffecc28de234 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c @@ -1221,6 +1221,11 @@ static int stmmac_phy_setup(struct stmmac_priv *priv) priv->phylink_config.type = PHYLINK_NETDEV; priv->phylink_config.mac_managed_pm = true; + /* stmmac always requires a receive clock in order for things like + * hardware reset to work. + */ + priv->phylink_config.mac_requires_rxc = true; + mdio_bus_data = priv->plat->mdio_bus_data; if (mdio_bus_data) priv->phylink_config.ovr_an_inband =