From patchwork Mon Feb 12 16:42:12 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Romain Gantois X-Patchwork-Id: 13553631 X-Patchwork-Delegate: geert@linux-m68k.org Received: from relay2-d.mail.gandi.net (relay2-d.mail.gandi.net [217.70.183.194]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2345440BF0; Mon, 12 Feb 2024 16:41:50 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.194 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707756113; cv=none; b=PeMBtibepJl3/qm3e09khZQpXjN7WnvdkJuYfkH3fyI+6I9NYXOGrz9kXdMwNUSUQX4Q9Rpi6izttImuoRlacZD1gVDxmqO0du/qndTY2vjDBciCrK6i9GBb7e7Af8ymvr1FPliZ1jxb5vgAIBUR9l+W/VJasuGSUBnEjvkypg0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707756113; c=relaxed/simple; bh=v9bDpvvX0RKMMrCA98TweMMDMhM4ZPyJFANVu501FdY=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=m0HgeDekQT8U6hFdbC53foIR1LK5pR7Ga3DQmmIBQ1RVEzDCIZSHX1BDq09Ai+f7BcyWWwLsUcGUOI8fn7Ro9ALHVOx8DdcPjkx5KbsWfAhDGzAULKeHUO5p1x9gvc4nirvuXkRri5cau0slNOZBeA+hB+b7n9XVcYmf4Q2NhBg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=SRVKwD5T; arc=none smtp.client-ip=217.70.183.194 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="SRVKwD5T" Received: by mail.gandi.net (Postfix) with ESMTPSA id 68ABF4000C; Mon, 12 Feb 2024 16:41:48 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1707756109; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=yRIMbE0unjYrvpCkfTYc04XJCl1PK7tAYUxBqamkw58=; b=SRVKwD5TC6/Q/eaZF0TKEEqglU/W26MWXFS0LesVfLHa/r8b4Bqs2Pr/fVFXoa4rUp0gqA cJC/8k6hbAEkuAG9Nw+UxdOqzXzvv54Hfw506EknpjJSlydEasazH1gM3biMrHyUUlXaNF qtrwepyhLN30iZoM+OJMUTmPhX49xDk3JqSJlAvmX5T+OSj+U8Wh82ezTLmFOHBOEmWW5k ZPwnTns+FH6Wsn4C7QLbkl4aAIEBVElezT59+mUT9iDNQae4DQM7gWexF+Yu/JcBI88Efz kCVgkXkRTkJ6bdO5imQ3DBJaNVLNN1gR85zREm0vlKuNsf9uebNloGTwkZAp5A== From: Romain Gantois Date: Mon, 12 Feb 2024 17:42:12 +0100 Subject: [PATCH net-next v3 5/7] net: stmmac: Signal to PHY/PCS drivers to keep RX clock on Precedence: bulk X-Mailing-List: linux-renesas-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240212-rxc_bugfix-v3-5-e9f2eb6b3b05@bootlin.com> References: <20240212-rxc_bugfix-v3-0-e9f2eb6b3b05@bootlin.com> In-Reply-To: <20240212-rxc_bugfix-v3-0-e9f2eb6b3b05@bootlin.com> To: Russell King , Andrew Lunn , Heiner Kallweit , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Alexandre Torgue , Jose Abreu , Maxime Coquelin , =?utf-8?b?Q2zDqW1lbnQgTMOp?= =?utf-8?b?Z2Vy?= Cc: Maxime Chevallier , Miquel Raynal , Thomas Petazzoni , netdev@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, linux-renesas-soc@vger.kernel.org, Clark Wang , Romain Gantois X-Mailer: b4 0.12.4 X-GND-Sasl: romain.gantois@bootlin.com There is a reocurring issue with stmmac controllers where the MAC fails to initialize its hardware if an RX clock signal isn't provided on the MAC/PHY link. This causes issues when PHY or PCS devices either go into suspend while cutting the RX clock or do not bring the clock signal up early enough for the MAC to initialize successfully. Set the mac_requires_rxc flag in the stmmac phylink config so that PHY/PCS drivers know to keep the RX clock up at all times. Reported-by: Clark Wang Link: https://lore.kernel.org/all/20230202081559.3553637-1-xiaoning.wang@nxp.com/ Reported-by: Clément Léger Link: https://lore.kernel.org/linux-arm-kernel/20230116103926.276869-4-clement.leger@bootlin.com/ Suggested-by: Russell King Signed-off-by: Romain Gantois --- drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c index ec4f6377b5ee..caf71a502ff2 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c @@ -1218,6 +1218,9 @@ static int stmmac_phy_setup(struct stmmac_priv *priv) priv->phylink_config.type = PHYLINK_NETDEV; priv->phylink_config.mac_managed_pm = true; + /* Stmmac always requires an RX clock for hardware initialization */ + priv->phylink_config.mac_requires_rxc = true; + mdio_bus_data = priv->plat->mdio_bus_data; if (mdio_bus_data) priv->phylink_config.ovr_an_inband = @@ -3407,6 +3410,10 @@ static int stmmac_hw_setup(struct net_device *dev, bool ptp_register) u32 chan; int ret; + /* Make sure RX clock is enabled */ + if (priv->hw->phylink_pcs) + phylink_pcs_pre_init(priv->phylink, priv->hw->phylink_pcs); + /* DMA initialization and SW reset */ ret = stmmac_init_dma_engine(priv); if (ret < 0) {