| Message ID | 20240307114731.34953-1-prabhakar.mahadev-lad.rj@bp.renesas.com (mailing list archive) |
|---|---|
| State | Superseded |
| Delegated to: | Geert Uytterhoeven |
| Headers | show |
| Series | [v2] dt-bindings: serial: renesas,scif: Document R9A09G057 support | expand |
Hi Prabhakar, On Thu, Mar 7, 2024 at 12:48 PM Prabhakar <prabhakar.csengg@gmail.com> wrote: > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > > Document support for the Serial Communication Interface with FIFO (SCIF) > available in the Renesas RZ/V2H(P) (R9A09G057) SoC. The SCIF interface in > the Renesas RZ/V2H(P) is similar to that available in the RZ/G2L > (R9A07G044) SoC, with the only difference being that the RZ/V2H(P) SoC has > three additional interrupts: one for Tx end/Rx ready and the other two for > Rx and Tx buffer full, which are edge-triggered. > > No driver changes are required as generic compatible string > "renesas,scif-r9a07g044" will be used as a fallback on RZ/V2H(P) SoC. > > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > Reviewed-by: Fabrizio Castro <fabrizio.castro.jz@renesas.com> > --- > v1->v2 > * Added validation to check interrupts and interrupt-names count Thanks for the update! > --- a/Documentation/devicetree/bindings/serial/renesas,scif.yaml > +++ b/Documentation/devicetree/bindings/serial/renesas,scif.yaml > @@ -77,6 +77,7 @@ properties: > - renesas,scif-r9a07g043 # RZ/G2UL and RZ/Five > - renesas,scif-r9a07g054 # RZ/V2L > - renesas,scif-r9a08g045 # RZ/G3S > + - renesas,scif-r9a09g057 # RZ/V2H(P) > - const: renesas,scif-r9a07g044 # RZ/G2{L,LC} fallback > > reg: > @@ -91,6 +92,9 @@ properties: > - description: Break interrupt > - description: Data Ready interrupt > - description: Transmit End interrupt > + - description: Transmit End/Data Ready interrupt > + - description: Receive buffer full interrupt (EDGE trigger) > + - description: Transmit buffer empty interrupt (EDGE trigger) > > interrupt-names: > minItems: 4 > @@ -101,6 +105,9 @@ properties: > - const: bri > - const: dri > - const: tei > + - const: teidri As the documentation calls this interrupt "ub1_tei_dri_n", I think "tei-dri" would be a better name. > + - const: rxi-edge > + - const: txi-edge The rest LGTM. Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
On Thu, Mar 07, 2024 at 11:47:31AM +0000, Prabhakar wrote: > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > > Document support for the Serial Communication Interface with FIFO (SCIF) > available in the Renesas RZ/V2H(P) (R9A09G057) SoC. The SCIF interface in > the Renesas RZ/V2H(P) is similar to that available in the RZ/G2L > (R9A07G044) SoC, with the only difference being that the RZ/V2H(P) SoC has > three additional interrupts: one for Tx end/Rx ready and the other two for > Rx and Tx buffer full, which are edge-triggered. > > No driver changes are required as generic compatible string > "renesas,scif-r9a07g044" will be used as a fallback on RZ/V2H(P) SoC. > > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > Reviewed-by: Fabrizio Castro <fabrizio.castro.jz@renesas.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Thanks, Conor. > --- > v1->v2 > * Added validation to check interrupts and interrupt-names count > > Note, this patch applies on top of series [0]. > > [0] https://patchwork.ozlabs.org/project/devicetree-bindings/cover/20240307114217.34784-1-prabhakar.mahadev-lad.rj@bp.renesas.com/ > --- > .../bindings/serial/renesas,scif.yaml | 31 ++++++++++++++++--- > 1 file changed, 27 insertions(+), 4 deletions(-) > > diff --git a/Documentation/devicetree/bindings/serial/renesas,scif.yaml b/Documentation/devicetree/bindings/serial/renesas,scif.yaml > index 6ba6b6d52208..a9c60334d702 100644 > --- a/Documentation/devicetree/bindings/serial/renesas,scif.yaml > +++ b/Documentation/devicetree/bindings/serial/renesas,scif.yaml > @@ -77,6 +77,7 @@ properties: > - renesas,scif-r9a07g043 # RZ/G2UL and RZ/Five > - renesas,scif-r9a07g054 # RZ/V2L > - renesas,scif-r9a08g045 # RZ/G3S > + - renesas,scif-r9a09g057 # RZ/V2H(P) > - const: renesas,scif-r9a07g044 # RZ/G2{L,LC} fallback > > reg: > @@ -91,6 +92,9 @@ properties: > - description: Break interrupt > - description: Data Ready interrupt > - description: Transmit End interrupt > + - description: Transmit End/Data Ready interrupt > + - description: Receive buffer full interrupt (EDGE trigger) > + - description: Transmit buffer empty interrupt (EDGE trigger) > > interrupt-names: > minItems: 4 > @@ -101,6 +105,9 @@ properties: > - const: bri > - const: dri > - const: tei > + - const: teidri > + - const: rxi-edge > + - const: txi-edge > > clocks: > minItems: 1 > @@ -197,15 +204,31 @@ allOf: > compatible: > contains: > enum: > - - renesas,scif-r7s9210 > - - renesas,scif-r9a07g044 > + - renesas,scif-r9a09g057 > then: > properties: > interrupts: > - minItems: 6 > + minItems: 9 > > interrupt-names: > - minItems: 6 > + minItems: 9 > + else: > + if: > + properties: > + compatible: > + contains: > + enum: > + - renesas,scif-r7s9210 > + - renesas,scif-r9a07g044 > + then: > + properties: > + interrupts: > + minItems: 6 > + maxItems: 6 > + > + interrupt-names: > + minItems: 6 > + maxItems: 6 > > unevaluatedProperties: false > > -- > 2.34.1 >
diff --git a/Documentation/devicetree/bindings/serial/renesas,scif.yaml b/Documentation/devicetree/bindings/serial/renesas,scif.yaml index 6ba6b6d52208..a9c60334d702 100644 --- a/Documentation/devicetree/bindings/serial/renesas,scif.yaml +++ b/Documentation/devicetree/bindings/serial/renesas,scif.yaml @@ -77,6 +77,7 @@ properties: - renesas,scif-r9a07g043 # RZ/G2UL and RZ/Five - renesas,scif-r9a07g054 # RZ/V2L - renesas,scif-r9a08g045 # RZ/G3S + - renesas,scif-r9a09g057 # RZ/V2H(P) - const: renesas,scif-r9a07g044 # RZ/G2{L,LC} fallback reg: @@ -91,6 +92,9 @@ properties: - description: Break interrupt - description: Data Ready interrupt - description: Transmit End interrupt + - description: Transmit End/Data Ready interrupt + - description: Receive buffer full interrupt (EDGE trigger) + - description: Transmit buffer empty interrupt (EDGE trigger) interrupt-names: minItems: 4 @@ -101,6 +105,9 @@ properties: - const: bri - const: dri - const: tei + - const: teidri + - const: rxi-edge + - const: txi-edge clocks: minItems: 1 @@ -197,15 +204,31 @@ allOf: compatible: contains: enum: - - renesas,scif-r7s9210 - - renesas,scif-r9a07g044 + - renesas,scif-r9a09g057 then: properties: interrupts: - minItems: 6 + minItems: 9 interrupt-names: - minItems: 6 + minItems: 9 + else: + if: + properties: + compatible: + contains: + enum: + - renesas,scif-r7s9210 + - renesas,scif-r9a07g044 + then: + properties: + interrupts: + minItems: 6 + maxItems: 6 + + interrupt-names: + minItems: 6 + maxItems: 6 unevaluatedProperties: false