From patchwork Mon Mar 11 09:55:48 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Romain Gantois X-Patchwork-Id: 13588487 X-Patchwork-Delegate: geert@linux-m68k.org Received: from relay4-d.mail.gandi.net (relay4-d.mail.gandi.net [217.70.183.196]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 241202C861; Mon, 11 Mar 2024 09:55:28 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.196 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1710150931; cv=none; b=NNDlcFcOUl/O84PXXJpiNsmI7U1SVc6j+zbQWh4g+gJ7R13ouZ6BnY25FJXcMn69b26chc5s1886oaUQ5LzC/sj1ijlvSYL9AjGhDOifac3Nrt78kLMESjsPRj0IcNEptDBhiHobgy4JYaoP9LK9iphy2M+eYvxNku8ryClQf4s= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1710150931; c=relaxed/simple; bh=zkKjf/c8JwMi7XB286FG0JwvrRIvg/jN2F9USNeJxWo=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=BhutFcZePflMwhtvD5fEzBpKAxjkH1DlcPlGaBTlYv1Be7o1dmuWeJi6KfWk7BcThx9X/iL3jwmQqsw7q50N87j2rO4zzmBepKjhOT/uFkyEwSjp0ZUg8yEgjUcaCzpUOZoGu+hugTBIUGAbpa+38F3vNDpjEfDPtbFzU3Pze6M= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=VHq2XSWy; arc=none smtp.client-ip=217.70.183.196 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="VHq2XSWy" Received: by mail.gandi.net (Postfix) with ESMTPSA id B45F2E0002; Mon, 11 Mar 2024 09:55:20 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1710150921; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=5X4Vqf5dMNOvdBRrjTCmAMrnSKF3wTY7sOX12e/v6N8=; b=VHq2XSWyLTwqugolTBbNtNpUUrcQfUiEapqyjnr+XWAqQp7Bg9DlDhgbRGEm3KW/JYFDuA KJXTrUrEQhlpbZR4FdIHzGGh+wc4AbijpAtSkKs809PvURwbvs2CrxGdraLqked3FgNnKu d6IOHl/FjmC8uuuVqp+eAy9YvVUXw00IvNTKTTvD71r+tJcMhyCZIxl1k78E4f2i3RMPxy JBMOk8qbbgygfA17A6dGnBVMZYt0hvpP2WP1n0EFGoOw7q5Y+MOHY7bL4qXMUoSEyElp0X iv5YTFSEhFGpM8HtvuAnRix8QqGs8fTn8U8Wtp4XzPv1jJtn3a3ftQv0XuSSfw== From: Romain Gantois Date: Mon, 11 Mar 2024 10:55:48 +0100 Subject: [PATCH net-next v6 5/7] net: stmmac: Signal to PHY/PCS drivers to keep RX clock on Precedence: bulk X-Mailing-List: linux-renesas-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240311-rxc_bugfix-v6-5-adf5133829a2@bootlin.com> References: <20240311-rxc_bugfix-v6-0-adf5133829a2@bootlin.com> In-Reply-To: <20240311-rxc_bugfix-v6-0-adf5133829a2@bootlin.com> To: Russell King , Andrew Lunn , Heiner Kallweit , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Alexandre Torgue , Jose Abreu , Maxime Coquelin , =?utf-8?b?Q2zDqW1lbnQgTMOp?= =?utf-8?b?Z2Vy?= Cc: Maxime Chevallier , Miquel Raynal , Thomas Petazzoni , netdev@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, linux-renesas-soc@vger.kernel.org, Clark Wang , "Russell King (Oracle)" , Romain Gantois X-Mailer: b4 0.13.0 X-GND-Sasl: romain.gantois@bootlin.com There is a reocurring issue with stmmac controllers where the MAC fails to initialize its hardware if an RX clock signal isn't provided on the MAC/PHY link. This causes issues when PHY or PCS devices either go into suspend while cutting the RX clock or do not bring the clock signal up early enough for the MAC to initialize successfully. Set the mac_requires_rxc flag in the stmmac phylink config so that PHY/PCS drivers know to keep the RX clock up at all times. Reported-by: Clark Wang Link: https://lore.kernel.org/all/20230202081559.3553637-1-xiaoning.wang@nxp.com/ Reported-by: Clément Léger Link: https://lore.kernel.org/linux-arm-kernel/20230116103926.276869-4-clement.leger@bootlin.com/ Co-developed-by: Russell King (Oracle) Signed-off-by: Russell King (Oracle) Signed-off-by: Romain Gantois Reviewed-by: Andrew Lunn --- drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c index 79844dbe4258..2290f4808d7e 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c @@ -1218,6 +1218,9 @@ static int stmmac_phy_setup(struct stmmac_priv *priv) priv->phylink_config.type = PHYLINK_NETDEV; priv->phylink_config.mac_managed_pm = true; + /* Stmmac always requires an RX clock for hardware initialization */ + priv->phylink_config.mac_requires_rxc = true; + mdio_bus_data = priv->plat->mdio_bus_data; if (mdio_bus_data) priv->phylink_config.ovr_an_inband = @@ -3408,6 +3411,10 @@ static int stmmac_hw_setup(struct net_device *dev, bool ptp_register) u32 chan; int ret; + /* Make sure RX clock is enabled */ + if (priv->hw->phylink_pcs) + phylink_pcs_pre_init(priv->phylink, priv->hw->phylink_pcs); + /* DMA initialization and SW reset */ ret = stmmac_init_dma_engine(priv); if (ret < 0) {