From patchwork Tue Jun 18 17:48:29 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Lad, Prabhakar" X-Patchwork-Id: 13702806 X-Patchwork-Delegate: geert@linux-m68k.org Received: from mail-wr1-f54.google.com (mail-wr1-f54.google.com [209.85.221.54]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E88C3146A88; Tue, 18 Jun 2024 17:48:54 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.221.54 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1718732936; cv=none; b=oB9aE72ufEILP+lsXSrrLtwGigMjsKgJ3T0dWeaVmukxxuzSDthqujmQv8g9w62QohS6AVjcPECgm9mu5XwCJz04abQ/6PHu1tZVHMDB/1EUlx9S/7TOXJjjzgUqceTvRNyOIBTCyoP6GgzT7s3ba4y7BDzo40h2gIXC6djoz6c= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1718732936; c=relaxed/simple; bh=/wBiLkEL7+t/VFljDgwVFcmYJV2Hk3qjaknqUhlnDAM=; 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AJvYcCWyZ7XwrZ3TA+hnNs4K/g8A4EbBzBrS+8X65h0zdQC9yPWoAJPOL+lwGFscSLvpDyuB7yTsRS1elIP8YD6Uv5OIl57lksneJ4DJSG9JWFUEyBLMwQjV75XNT4D+xqQUNIEot2ZcnlusXQ== X-Gm-Message-State: AOJu0Yyb2adL5ll4GF5rx8ebstwvmeXCVONXhlCoBhCQKMxem7GokVIO m9FCyQzv67fdoF8iOCCWf0adinhalI909xGOvykexaBbNHOB2jaO X-Google-Smtp-Source: AGHT+IEO81914l+l9VHwW08e5/YQkj6Qi+kh58InUi/mkEL3/n/cDSZ7kkWNjUVEgQ92h4wtqfSPxg== X-Received: by 2002:a5d:6c6a:0:b0:360:9ed3:70bb with SMTP id ffacd0b85a97d-3609ed37150mr4060432f8f.2.1718732933300; Tue, 18 Jun 2024 10:48:53 -0700 (PDT) Received: from prasmi.home ([2a00:23c8:2500:a01:d6f0:b448:a40c:81a7]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-36289a4faeasm1253644f8f.95.2024.06.18.10.48.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 18 Jun 2024 10:48:52 -0700 (PDT) From: Prabhakar X-Google-Original-From: Prabhakar To: Geert Uytterhoeven , Linus Walleij Cc: linux-renesas-soc@vger.kernel.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, Prabhakar , Biju Das , Fabrizio Castro , Lad Prabhakar Subject: [PATCH 2/4] pinctrl: renesas: rzg2l: Adjust bit masks for PIN_CFG_VARIABLE to use BIT(62) Date: Tue, 18 Jun 2024 18:48:29 +0100 Message-Id: <20240618174831.415583-3-prabhakar.mahadev-lad.rj@bp.renesas.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240618174831.415583-1-prabhakar.mahadev-lad.rj@bp.renesas.com> References: <20240618174831.415583-1-prabhakar.mahadev-lad.rj@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-renesas-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Lad Prabhakar Shift the bit masks for `PIN_CFG_PIN_MAP_MASK` and `PIN_CFG_PIN_REG_MASK`, to accommodate `PIN_CFG_VARIABLE` using `BIT(62)`. Previously, these bit masks were placed higher up in the bit range, which did not leave room for `PIN_CFG_VARIABLE` at `BIT(62)`. By adjusting these masks, we ensure that `PIN_CFG_VARIABLE` can occupy `BIT(62)` without any conflicts. The updated masks are now: - `PIN_CFG_PIN_MAP_MASK`: `GENMASK_ULL(61, 54)` (was `GENMASK_ULL(62, 55)`) - `PIN_CFG_PIN_REG_MASK`: `GENMASK_ULL(53, 46)` (was `GENMASK_ULL(54, 47)`) Signed-off-by: Lad Prabhakar Reviewed-by: Geert Uytterhoeven Tested-by: Claudiu Beznea --- drivers/pinctrl/renesas/pinctrl-rzg2l.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/pinctrl/renesas/pinctrl-rzg2l.c b/drivers/pinctrl/renesas/pinctrl-rzg2l.c index bfaeeb00ac4a..b79dd1ea2616 100644 --- a/drivers/pinctrl/renesas/pinctrl-rzg2l.c +++ b/drivers/pinctrl/renesas/pinctrl-rzg2l.c @@ -87,8 +87,8 @@ PIN_CFG_FILNUM | \ PIN_CFG_FILCLKSEL) -#define PIN_CFG_PIN_MAP_MASK GENMASK_ULL(62, 55) -#define PIN_CFG_PIN_REG_MASK GENMASK_ULL(54, 47) +#define PIN_CFG_PIN_MAP_MASK GENMASK_ULL(61, 54) +#define PIN_CFG_PIN_REG_MASK GENMASK_ULL(53, 46) #define PIN_CFG_MASK GENMASK_ULL(31, 0) /*