diff mbox series

[v2,2/2] arm64: dts: renesas: white-hawk-single: Wire-up Ethernet TSN

Message ID 20240701145012.2342868-3-niklas.soderlund+renesas@ragnatech.se (mailing list archive)
State Mainlined
Commit 3d8e475bd7a724a97cffebcaae7230abae2ca170
Delegated to: Geert Uytterhoeven
Headers show
Series arm64: dts: renesas: Add TSN support for V4H | expand

Commit Message

Niklas Söderlund July 1, 2024, 2:50 p.m. UTC
On the V4H White-Hawk Single board as oppose to the Quad board the
Ethernet TSN is wired up to a PHY (Marvel 88Q2110/QFN40). Wire up the
connection and enable the TSN0.

Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
---
 .../renesas/r8a779g2-white-hawk-single.dts    | 51 +++++++++++++++++++
 1 file changed, 51 insertions(+)

Comments

Geert Uytterhoeven Aug. 22, 2024, 3:25 p.m. UTC | #1
Hi Niklas,

On Mon, Jul 1, 2024 at 4:50 PM Niklas Söderlund
<niklas.soderlund+renesas@ragnatech.se> wrote:
> On the V4H White-Hawk Single board as oppose to the Quad board the
> Ethernet TSN is wired up to a PHY (Marvel 88Q2110/QFN40). Wire up the
> connection and enable the TSN0.
>
> Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>

Thanks for your patch!

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
i.e. will queue in renesas-devel for v6.12.

> --- a/arch/arm64/boot/dts/renesas/r8a779g2-white-hawk-single.dts
> +++ b/arch/arm64/boot/dts/renesas/r8a779g2-white-hawk-single.dts
> @@ -24,3 +24,54 @@ &hscif0_pins {
>         groups = "hscif0_data", "hscif0_ctrl";
>         function = "hscif0";
>  };
> +
> +&pfc {
> +       tsn0_pins: tsn0 {
> +               mux {
> +                       groups = "tsn0_link", "tsn0_mdio", "tsn0_rgmii",
> +                                "tsn0_txcrefclk";
> +                       function = "tsn0";
> +               };
> +
> +               mdio {
> +                       groups = "tsn0_mdio";
> +                       drive-strength = <24>;
> +                       bias-disable;
> +               };
> +
> +               rgmii {
> +                       groups = "tsn0_rgmii";
> +                       drive-strength = <24>;
> +                       bias-disable;
> +               };
> +
> +               link {
> +                       groups = "tsn0_link";
> +                       bias-disable;
> +               };

If you don't mind, I'll move the "link" node before the "mdio" node while
applying, to match the (alphabetical) order in mux/groups.

> +       };
> +};

Gr{oetje,eeting}s,

                        Geert
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/renesas/r8a779g2-white-hawk-single.dts b/arch/arm64/boot/dts/renesas/r8a779g2-white-hawk-single.dts
index 2f79e5a61248..b5f182903702 100644
--- a/arch/arm64/boot/dts/renesas/r8a779g2-white-hawk-single.dts
+++ b/arch/arm64/boot/dts/renesas/r8a779g2-white-hawk-single.dts
@@ -24,3 +24,54 @@  &hscif0_pins {
 	groups = "hscif0_data", "hscif0_ctrl";
 	function = "hscif0";
 };
+
+&pfc {
+	tsn0_pins: tsn0 {
+		mux {
+			groups = "tsn0_link", "tsn0_mdio", "tsn0_rgmii",
+				 "tsn0_txcrefclk";
+			function = "tsn0";
+		};
+
+		mdio {
+			groups = "tsn0_mdio";
+			drive-strength = <24>;
+			bias-disable;
+		};
+
+		rgmii {
+			groups = "tsn0_rgmii";
+			drive-strength = <24>;
+			bias-disable;
+		};
+
+		link {
+			groups = "tsn0_link";
+			bias-disable;
+		};
+	};
+};
+
+&tsn0 {
+	pinctrl-0 = <&tsn0_pins>;
+	pinctrl-names = "default";
+	phy-mode = "rgmii";
+	phy-handle = <&phy3>;
+	status = "okay";
+
+	mdio {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		reset-gpios = <&gpio1 23 GPIO_ACTIVE_LOW>;
+		reset-post-delay-us = <4000>;
+
+		phy3: ethernet-phy@0 {
+			compatible = "ethernet-phy-id002b.0980",
+				     "ethernet-phy-ieee802.3-c22";
+			reg = <0>;
+			interrupt-parent = <&gpio4>;
+			interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
+		};
+	};
+};