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AJvYcCVPNbk8VQoVK6VKpUZTchNnGRFhBCQp0hZmQBoZdZlSNxvhcIjGANjd9utta11HDTErak5KdJsJWI2RQ5TLvT5P75mbFz+rRj4qbA7FEHrQ6aMXTQ5KJIr2sQp7U8YYxXVricMEg3gflQ== X-Gm-Message-State: AOJu0YyW4WHuRvTjnwi4uQhHlYGpEXFhmPs8QMdpYMVz2RiQc6Nmgk6D 4c4Hyx5Hq1X+mGTbWTIhd1jpdAYVswC1ubGak8PBL21w+/KkNm+x X-Google-Smtp-Source: AGHT+IE5eQ/VXdwcq5RN4hLwEJw6f87lj9E/TTK5qThwMcWLwxdURfrj3lCx8y0e3LD7OswrIIJuHQ== X-Received: by 2002:a05:600c:3ac5:b0:426:673a:2904 with SMTP id 5b1f17b1804b1-427f7adf206mr25866645e9.36.1721835308013; Wed, 24 Jul 2024 08:35:08 -0700 (PDT) Received: from prasmi.home ([2a00:23c8:2500:a01:2595:4364:d152:dff3]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-427f9397337sm34609565e9.23.2024.07.24.08.35.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 24 Jul 2024 08:35:07 -0700 (PDT) From: Prabhakar X-Google-Original-From: Prabhakar To: Geert Uytterhoeven , Magnus Damm , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Prabhakar , Fabrizio Castro , Lad Prabhakar Subject: [PATCH 2/2] arm64: dts: renesas: Add initial DTS for RZ/V2H GP-EVK board Date: Wed, 24 Jul 2024 16:33:39 +0100 Message-Id: <20240724153339.626460-3-prabhakar.mahadev-lad.rj@bp.renesas.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240724153339.626460-1-prabhakar.mahadev-lad.rj@bp.renesas.com> References: <20240724153339.626460-1-prabhakar.mahadev-lad.rj@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-renesas-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Lad Prabhakar Add initial DTS for RZ/V2H GP-EVK board, adding the below support: - Memory - Clock inputs - PINCTRL - SCIF Signed-off-by: Lad Prabhakar --- arch/arm64/boot/dts/renesas/Makefile | 2 + .../boot/dts/renesas/r9a09g057h44-gp-evk.dts | 61 +++++++++++++++++++ 2 files changed, 63 insertions(+) create mode 100644 arch/arm64/boot/dts/renesas/r9a09g057h44-gp-evk.dts diff --git a/arch/arm64/boot/dts/renesas/Makefile b/arch/arm64/boot/dts/renesas/Makefile index fbd214a1a638..b2249a2710aa 100644 --- a/arch/arm64/boot/dts/renesas/Makefile +++ b/arch/arm64/boot/dts/renesas/Makefile @@ -137,5 +137,7 @@ dtb-$(CONFIG_ARCH_R9A08G045) += r9a08g045s33-smarc.dtb dtb-$(CONFIG_ARCH_R9A09G011) += r9a09g011-v2mevk2.dtb +dtb-$(CONFIG_ARCH_R9A09G057) += r9a09g057h44-gp-evk.dtb + dtb-$(CONFIG_ARCH_RCAR_GEN3) += draak-ebisu-panel-aa104xd12.dtbo dtb-$(CONFIG_ARCH_RCAR_GEN3) += salvator-panel-aa104xd12.dtbo diff --git a/arch/arm64/boot/dts/renesas/r9a09g057h44-gp-evk.dts b/arch/arm64/boot/dts/renesas/r9a09g057h44-gp-evk.dts new file mode 100644 index 000000000000..593c48181248 --- /dev/null +++ b/arch/arm64/boot/dts/renesas/r9a09g057h44-gp-evk.dts @@ -0,0 +1,61 @@ +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +/* + * Device Tree Source for the RZ/V2H GP-EVK board + * + * Copyright (C) 2024 Renesas Electronics Corp. + */ + +/dts-v1/; + +#include "r9a09g057.dtsi" + +/ { + model = "Renesas GP-EVK Board based on r9a09g057h44"; + compatible = "renesas,gp-evk", "renesas,r9a09g057h44", "renesas,r9a09g057"; + + aliases { + serial0 = &scif; + }; + + chosen { + bootargs = "ignore_loglevel"; + stdout-path = "serial0:115200n8"; + }; + + memory@48000000 { + device_type = "memory"; + /* first 128MB is reserved for secure area. */ + reg = <0x0 0x48000000 0x1 0xF8000000>; + }; + + memory@240000000 { + device_type = "memory"; + reg = <0x2 0x40000000 0x2 0x00000000>; + }; +}; + +&audio_extal_clk { + clock-frequency = <22579200>; +}; + +&pinctrl { + scif_pins: scif { + pins = "SCIF_TXD", "SCIF_RXD"; + renesas,output-impedance = <1>; + }; +}; + +&qextal_clk { + clock-frequency = <24000000>; +}; + +&rtxin_clk { + clock-frequency = <32768>; +}; + +&scif { + pinctrl-0 = <&scif_pins>; + pinctrl-names = "default"; + + status = "okay"; +};