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AJvYcCUY+b4JuiiVpIgcPf38H68SBlG1tgcCfLIN+EVDwxccwwCVaAmKjgVxfNzEnqfJpCCMIitfJlSQke2EXyKCpXBn99UTIx6brAJfKo0bN/RHKiIm8uE8PtBm5OIoZXWHxFeBdM1y1PCp6g== X-Gm-Message-State: AOJu0YxFqM3vs+xBWO/JWh9xE1HzvOL9GwNucSmQDLvQU5IaHfkK+2kV NScLLcU4DTR+7rq6u+C+AHUoUtaV6lSSiBJA8Sdp6SdLtngbS1Zr X-Google-Smtp-Source: AGHT+IGlb4dOk4VzLZpSpenlo4xJtSsrZhsMz0LzrfYMp9ZmU6SV5UV02yJzGqiPIIectoxSLQHThw== X-Received: by 2002:a05:600c:4fd2:b0:426:640b:73d9 with SMTP id 5b1f17b1804b1-42806b7e3bdmr16723795e9.10.1721914876213; Thu, 25 Jul 2024 06:41:16 -0700 (PDT) Received: from prasmi.home ([2a00:23c8:2500:a01:2595:4364:d152:dff3]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-427f93e605esm80447085e9.34.2024.07.25.06.41.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 25 Jul 2024 06:41:15 -0700 (PDT) From: Prabhakar X-Google-Original-From: Prabhakar To: Geert Uytterhoeven , Marc Zyngier , Magnus Damm , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Prabhakar , Biju Das , Fabrizio Castro , Lad Prabhakar Subject: [PATCH 2/5] arm64: dts: renesas: r9a07g043u: Correct GICD and GICR sizes Date: Thu, 25 Jul 2024 14:39:29 +0100 Message-Id: <20240725133932.739936-3-prabhakar.mahadev-lad.rj@bp.renesas.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240725133932.739936-1-prabhakar.mahadev-lad.rj@bp.renesas.com> References: <20240725133932.739936-1-prabhakar.mahadev-lad.rj@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-renesas-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Lad Prabhakar The RZ/G2UL SoC is equipped with the GIC-600. The GICD + GICDA is 128kB, and the GICR is 128kB per CPU. Despite the RZ/G2UL SoC being single-core, it has two instances of GICR. Fixes: cf40c9689e510 ("arm64: dts: renesas: Add initial DTSI for RZ/G2UL SoC") Signed-off-by: Lad Prabhakar --- arch/arm64/boot/dts/renesas/r9a07g043u.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/renesas/r9a07g043u.dtsi b/arch/arm64/boot/dts/renesas/r9a07g043u.dtsi index 0a4f24d83791..3bc3b7bccda7 100644 --- a/arch/arm64/boot/dts/renesas/r9a07g043u.dtsi +++ b/arch/arm64/boot/dts/renesas/r9a07g043u.dtsi @@ -259,8 +259,8 @@ gic: interrupt-controller@11900000 { #interrupt-cells = <3>; #address-cells = <0>; interrupt-controller; - reg = <0x0 0x11900000 0 0x40000>, - <0x0 0x11940000 0 0x60000>; + reg = <0x0 0x11900000 0 0x20000>, + <0x0 0x11940000 0 0x40000>; interrupts = ; }; };