Message ID | 20240725194906.14644-10-wsa+renesas@sang-engineering.com (mailing list archive) |
---|---|
State | Under Review |
Delegated to: | Geert Uytterhoeven |
Headers | show |
Series | PWM & TPU patches for V4M | expand |
On Thu, Jul 25, 2024 at 9:49 PM Wolfram Sang <wsa+renesas@sang-engineering.com> wrote: > From: Cong Dang <cong.dang.xn@renesas.com> > > Add the module clock used by the 16-Bit Timer Pulse Unit (TPU) on the > Renesas R-Car V4M (R8A779H0) SoC. > > Signed-off-by: Cong Dang <cong.dang.xn@renesas.com> > [wsa: rebased] > Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> i.e. will queue in renesas-clk for v6.12. Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
On Mon, Jul 29, 2024 at 8:39 PM Geert Uytterhoeven <geert@linux-m68k.org> wrote: > On Thu, Jul 25, 2024 at 9:49 PM Wolfram Sang > <wsa+renesas@sang-engineering.com> wrote: > > From: Cong Dang <cong.dang.xn@renesas.com> > > > > Add the module clock used by the 16-Bit Timer Pulse Unit (TPU) on the > > Renesas R-Car V4M (R8A779H0) SoC. > > > > Signed-off-by: Cong Dang <cong.dang.xn@renesas.com> > > [wsa: rebased] > > Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> > > Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> > i.e. will queue in renesas-clk for v6.12. Postponing this until it works. Gr{oetje,eeting}s, Geert
diff --git a/drivers/clk/renesas/r8a779h0-cpg-mssr.c b/drivers/clk/renesas/r8a779h0-cpg-mssr.c index a9614d0c51ae..1f311206506d 100644 --- a/drivers/clk/renesas/r8a779h0-cpg-mssr.c +++ b/drivers/clk/renesas/r8a779h0-cpg-mssr.c @@ -209,6 +209,7 @@ static const struct mssr_mod_clk r8a779h0_mod_clks[] = { DEF_MOD("tmu2", 715, R8A779H0_CLK_SASYNCPERD2), DEF_MOD("tmu3", 716, R8A779H0_CLK_SASYNCPERD2), DEF_MOD("tmu4", 717, R8A779H0_CLK_SASYNCPERD2), + DEF_MOD("tpu0", 718, R8A779H0_CLK_SASYNCPERD4), DEF_MOD("vin00", 730, R8A779H0_CLK_S0D4_VIO), DEF_MOD("vin01", 731, R8A779H0_CLK_S0D4_VIO), DEF_MOD("vin02", 800, R8A779H0_CLK_S0D4_VIO),