From patchwork Fri Aug 30 20:30:04 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Biju Das X-Patchwork-Id: 13785525 X-Patchwork-Delegate: geert@linux-m68k.org Received: from relmlie5.idc.renesas.com (relmlor1.renesas.com [210.160.252.171]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 49808150984; Fri, 30 Aug 2024 20:30:30 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.160.252.171 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725049833; cv=none; b=KOlgGdEu5EiVOsU67Keoje6ZO+q+raJZgZlnw436gX3ZVdSwHIDNyjIhxba7owo/GoTl7iu0hLEQJsIeSCj0FhA5ftURkbsf6jlUjcocsf6cY1VccXhl4qlXIIQ5qwf5+CebNjZx/8Vj6zbQ70oiTzXSGYiy2T3HZvY0MTVRwGg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725049833; c=relaxed/simple; bh=srzrUd59aLClFBkR4TB38VRRD2rdTzI8CbHc0HVfaNY=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=bCsknAAlS/aM3RDygn+4GJ5p58+NudflRUnmhK6xbzQpS8FlKoBXU2AWCNgVNTk+FWOhwhzvktNZ4LqRZ/rWJunlE47YIXzcc5Zg1zi/T4shjTvHShxjlD5pzJBHBBjb8S48uGolm/wuBw7ChSVFQC6nx3hzSDvMo33E+v3+yKY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=bp.renesas.com; spf=pass smtp.mailfrom=bp.renesas.com; arc=none smtp.client-ip=210.160.252.171 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=bp.renesas.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bp.renesas.com X-IronPort-AV: E=Sophos;i="6.10,189,1719846000"; d="scan'208";a="217084518" Received: from unknown (HELO relmlir6.idc.renesas.com) ([10.200.68.152]) by relmlie5.idc.renesas.com with ESMTP; 31 Aug 2024 05:30:26 +0900 Received: from localhost.localdomain (unknown [10.226.92.75]) by relmlir6.idc.renesas.com (Postfix) with ESMTP id B955D406DF57; Sat, 31 Aug 2024 05:30:23 +0900 (JST) From: Biju Das To: Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Biju Das , Geert Uytterhoeven , Magnus Damm , linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, Prabhakar Mahadev Lad , Biju Das Subject: [PATCH v2 RESEND 2/3] arm64: dts: renesas: rzg2ul-smarc-som: Enable serial NOR flash Date: Fri, 30 Aug 2024 21:30:04 +0100 Message-ID: <20240830203014.199326-3-biju.das.jz@bp.renesas.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240830203014.199326-1-biju.das.jz@bp.renesas.com> References: <20240830203014.199326-1-biju.das.jz@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-renesas-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Enable Renesas at25ql128a flash connected to QSPI0. Tested the flash by flashing bootloaders: flash_erase /dev/mtd0 0 0 flash_erase /dev/mtd1 0 0 mtd_debug write /dev/mtd0 0 ${BL2_FILE_SIZE} ${BL2_IMAGE} mtd_debug write /dev/mtd1 512 ${FIP_FILE_SIZE} ${FIP_IMAGE} Signed-off-by: Biju Das --- v2->v2 resend: * Rebased to next v2: * New patch. --- .../boot/dts/renesas/rzg2ul-smarc-som.dtsi | 48 +++++++++++++++++++ 1 file changed, 48 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/rzg2ul-smarc-som.dtsi b/arch/arm64/boot/dts/renesas/rzg2ul-smarc-som.dtsi index 79443fb3f581..2e458cdc8888 100644 --- a/arch/arm64/boot/dts/renesas/rzg2ul-smarc-som.dtsi +++ b/arch/arm64/boot/dts/renesas/rzg2ul-smarc-som.dtsi @@ -201,6 +201,18 @@ irq { }; }; + qspi0_pins: qspi0 { + qspi0-data { + pins = "QSPI0_IO0", "QSPI0_IO1", "QSPI0_IO2", "QSPI0_IO3"; + power-source = <1800>; + }; + + qspi0-ctrl { + pins = "QSPI0_SPCLK", "QSPI0_SSL"; + power-source = <1800>; + }; + }; + sdhi0_emmc_pins: sd0emmc { sd0_emmc_data { pins = "SD0_DATA0", "SD0_DATA1", "SD0_DATA2", "SD0_DATA3", @@ -252,6 +264,42 @@ sd0_mux_uhs { }; }; +&sbc { + pinctrl-0 = <&qspi0_pins>; + pinctrl-names = "default"; + status = "okay"; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + m25p,fast-read; + spi-max-frequency = <50000000>; + spi-rx-bus-width = <4>; + spi-tx-bus-width = <4>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "bl2"; + reg = <0x00000000 0x0001c000>; + }; + + partition@1d000 { /* fip is at offset 0x200 */ + label = "fip"; + reg = <0x0001d000 0x7e3000>; + }; + + partition@800000 { + label = "user"; + reg = <0x800000 0x800000>; + }; + }; + }; +}; + #if (SW_SW0_DEV_SEL) &sdhi0 { pinctrl-0 = <&sdhi0_emmc_pins>;