| Message ID | 20241004123658.764557-3-prabhakar.mahadev-lad.rj@bp.renesas.com (mailing list archive) |
|---|---|
| State | Accepted |
| Delegated to: | Geert Uytterhoeven |
| Headers | show |
| Series | pinctrl: renesas: rzg2l: Add support to configure open-drain and schmitt-trigger properties | expand |
On Fri, Oct 4, 2024 at 2:37 PM Prabhakar <prabhakar.csengg@gmail.com> wrote: > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > > Add support for enabling and disabling open-drain outputs. > > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > --- > v1->v2 > - Implemented PIN_CONFIG_DRIVE_OPEN_DRAIN to disable open drain Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> i.e. will queue in renesas-pinctrl for v6.13. Gr{oetje,eeting}s, Geert
On 04.10.2024 15:36, Prabhakar wrote: > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > > Add support for enabling and disabling open-drain outputs. > > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> I gave it a simple try on RZ/G3S. All good. You can add: Tested-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> > --- > v1->v2 > - Implemented PIN_CONFIG_DRIVE_OPEN_DRAIN to disable open drain > --- > drivers/pinctrl/renesas/pinctrl-rzg2l.c | 23 +++++++++++++++++++++++ > 1 file changed, 23 insertions(+) > > diff --git a/drivers/pinctrl/renesas/pinctrl-rzg2l.c b/drivers/pinctrl/renesas/pinctrl-rzg2l.c > index b2d309f742af..8d576cc74003 100644 > --- a/drivers/pinctrl/renesas/pinctrl-rzg2l.c > +++ b/drivers/pinctrl/renesas/pinctrl-rzg2l.c > @@ -139,6 +139,7 @@ > #define IEN(off) (0x1800 + (off) * 8) > #define PUPD(off) (0x1C00 + (off) * 8) > #define ISEL(off) (0x2C00 + (off) * 8) > +#define NOD(off) (0x3000 + (off) * 8) > #define SD_CH(off, ch) ((off) + (ch) * 4) > #define ETH_POC(off, ch) ((off) + (ch) * 4) > #define QSPI (0x3008) > @@ -160,6 +161,7 @@ > #define IOLH_MASK 0x03 > #define SR_MASK 0x01 > #define PUPD_MASK 0x03 > +#define NOD_MASK 0x01 > > #define PM_INPUT 0x1 > #define PM_OUTPUT 0x2 > @@ -1337,6 +1339,18 @@ static int rzg2l_pinctrl_pinconf_get(struct pinctrl_dev *pctldev, > break; > } > > + case PIN_CONFIG_DRIVE_OPEN_DRAIN: > + case PIN_CONFIG_DRIVE_PUSH_PULL: > + if (!(cfg & PIN_CFG_NOD)) > + return -EINVAL; > + > + arg = rzg2l_read_pin_config(pctrl, NOD(off), bit, NOD_MASK); > + if (!arg && param != PIN_CONFIG_DRIVE_PUSH_PULL) > + return -EINVAL; > + if (arg && param != PIN_CONFIG_DRIVE_OPEN_DRAIN) > + return -EINVAL; > + break; > + > case RENESAS_RZV2H_PIN_CONFIG_OUTPUT_IMPEDANCE: > if (!(cfg & PIN_CFG_IOLH_RZV2H)) > return -EINVAL; > @@ -1466,6 +1480,15 @@ static int rzg2l_pinctrl_pinconf_set(struct pinctrl_dev *pctldev, > rzg2l_rmw_pin_config(pctrl, IOLH(off), bit, IOLH_MASK, index); > break; > > + case PIN_CONFIG_DRIVE_OPEN_DRAIN: > + case PIN_CONFIG_DRIVE_PUSH_PULL: > + if (!(cfg & PIN_CFG_NOD)) > + return -EINVAL; > + > + rzg2l_rmw_pin_config(pctrl, NOD(off), bit, NOD_MASK, > + param == PIN_CONFIG_DRIVE_OPEN_DRAIN ? 1 : 0); > + break; > + > case RENESAS_RZV2H_PIN_CONFIG_OUTPUT_IMPEDANCE: > if (!(cfg & PIN_CFG_IOLH_RZV2H)) > return -EINVAL;
diff --git a/drivers/pinctrl/renesas/pinctrl-rzg2l.c b/drivers/pinctrl/renesas/pinctrl-rzg2l.c index b2d309f742af..8d576cc74003 100644 --- a/drivers/pinctrl/renesas/pinctrl-rzg2l.c +++ b/drivers/pinctrl/renesas/pinctrl-rzg2l.c @@ -139,6 +139,7 @@ #define IEN(off) (0x1800 + (off) * 8) #define PUPD(off) (0x1C00 + (off) * 8) #define ISEL(off) (0x2C00 + (off) * 8) +#define NOD(off) (0x3000 + (off) * 8) #define SD_CH(off, ch) ((off) + (ch) * 4) #define ETH_POC(off, ch) ((off) + (ch) * 4) #define QSPI (0x3008) @@ -160,6 +161,7 @@ #define IOLH_MASK 0x03 #define SR_MASK 0x01 #define PUPD_MASK 0x03 +#define NOD_MASK 0x01 #define PM_INPUT 0x1 #define PM_OUTPUT 0x2 @@ -1337,6 +1339,18 @@ static int rzg2l_pinctrl_pinconf_get(struct pinctrl_dev *pctldev, break; } + case PIN_CONFIG_DRIVE_OPEN_DRAIN: + case PIN_CONFIG_DRIVE_PUSH_PULL: + if (!(cfg & PIN_CFG_NOD)) + return -EINVAL; + + arg = rzg2l_read_pin_config(pctrl, NOD(off), bit, NOD_MASK); + if (!arg && param != PIN_CONFIG_DRIVE_PUSH_PULL) + return -EINVAL; + if (arg && param != PIN_CONFIG_DRIVE_OPEN_DRAIN) + return -EINVAL; + break; + case RENESAS_RZV2H_PIN_CONFIG_OUTPUT_IMPEDANCE: if (!(cfg & PIN_CFG_IOLH_RZV2H)) return -EINVAL; @@ -1466,6 +1480,15 @@ static int rzg2l_pinctrl_pinconf_set(struct pinctrl_dev *pctldev, rzg2l_rmw_pin_config(pctrl, IOLH(off), bit, IOLH_MASK, index); break; + case PIN_CONFIG_DRIVE_OPEN_DRAIN: + case PIN_CONFIG_DRIVE_PUSH_PULL: + if (!(cfg & PIN_CFG_NOD)) + return -EINVAL; + + rzg2l_rmw_pin_config(pctrl, NOD(off), bit, NOD_MASK, + param == PIN_CONFIG_DRIVE_OPEN_DRAIN ? 1 : 0); + break; + case RENESAS_RZV2H_PIN_CONFIG_OUTPUT_IMPEDANCE: if (!(cfg & PIN_CFG_IOLH_RZV2H)) return -EINVAL;