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AJvYcCW+rR8Nkoc7NVVM7RDw4VuJQMYtjB9O6X3QQaqJtoZ5Zu5wokJbhG+kUNtFs0KrrDGZrTwBc0e+sOcY@vger.kernel.org, AJvYcCWB2gAeeYFUwV9H5rH0ORpcYDvJVDg3TvYtayI2o5gV3uB4D78l/+HP2F7avVkuoEvRRN8kNrZNLXQWDKi9u3DEjkE=@vger.kernel.org, AJvYcCXIYuD4E6fUc5pK4bBwK+lYurze0Bix1jmJ2YakrkTXr/Rb1YtbEx7n/8bAQDpDyqMEmr2CI9WRlFdQJw==@vger.kernel.org X-Gm-Message-State: AOJu0Yx1Lk/j33lboufyOOf0lgDk1hVuKCPjUfOgIGVGkF0fDkRxjA1U jOfjtYzlTr8smB/eSNu4+fILC6ZSrRFtIj+fuffeDL1xtulezoCE X-Google-Smtp-Source: AGHT+IE4W2oVMvYqCn3CNsCQCsKnfZXEwQTrg4Gj7EWKW0quFbdwKQxU3mCuLo6luDI5xt0QWMZTsg== X-Received: by 2002:a05:600c:58d7:b0:431:54f3:11af with SMTP id 5b1f17b1804b1-43154f312eemr32846005e9.31.1729165191246; Thu, 17 Oct 2024 04:39:51 -0700 (PDT) Received: from prasmi.Home ([2a02:c7c:e309:f400:f6f5:4306:392d:908d]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-37d7fbf82b1sm7060399f8f.72.2024.10.17.04.39.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 17 Oct 2024 04:39:50 -0700 (PDT) From: Prabhakar X-Google-Original-From: Prabhakar To: Linus Walleij , Geert Uytterhoeven , Magnus Damm , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-gpio@vger.kernel.org, linux-renesas-soc@vger.kernel.org, Prabhakar , Biju Das , Fabrizio Castro , Lad Prabhakar Subject: [PATCH 2/7] pinctrl: renesas: rzg2l: Use gpiochip_populate_parent_fwspec_twocell helper Date: Thu, 17 Oct 2024 12:39:37 +0100 Message-ID: <20241017113942.139712-3-prabhakar.mahadev-lad.rj@bp.renesas.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20241017113942.139712-1-prabhakar.mahadev-lad.rj@bp.renesas.com> References: <20241017113942.139712-1-prabhakar.mahadev-lad.rj@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-renesas-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Lad Prabhakar Signed-off-by: Lad Prabhakar Reviewed-by: Geert Uytterhoeven --- drivers/pinctrl/renesas/pinctrl-rzg2l.c | 17 +---------------- 1 file changed, 1 insertion(+), 16 deletions(-) diff --git a/drivers/pinctrl/renesas/pinctrl-rzg2l.c b/drivers/pinctrl/renesas/pinctrl-rzg2l.c index 5eefbace7d91..8ffb9430a134 100644 --- a/drivers/pinctrl/renesas/pinctrl-rzg2l.c +++ b/drivers/pinctrl/renesas/pinctrl-rzg2l.c @@ -2433,21 +2433,6 @@ static int rzg2l_gpio_child_to_parent_hwirq(struct gpio_chip *gc, return ret; } -static int rzg2l_gpio_populate_parent_fwspec(struct gpio_chip *chip, - union gpio_irq_fwspec *gfwspec, - unsigned int parent_hwirq, - unsigned int parent_type) -{ - struct irq_fwspec *fwspec = &gfwspec->fwspec; - - fwspec->fwnode = chip->irq.parent_domain->fwnode; - fwspec->param_count = 2; - fwspec->param[0] = parent_hwirq; - fwspec->param[1] = parent_type; - - return 0; -} - static void rzg2l_gpio_irq_restore(struct rzg2l_pinctrl *pctrl) { struct irq_domain *domain = pctrl->gpio_chip.irq.domain; @@ -2649,7 +2634,7 @@ static int rzg2l_gpio_register(struct rzg2l_pinctrl *pctrl) girq->fwnode = dev_fwnode(pctrl->dev); girq->parent_domain = parent_domain; girq->child_to_parent_hwirq = rzg2l_gpio_child_to_parent_hwirq; - girq->populate_parent_alloc_arg = rzg2l_gpio_populate_parent_fwspec; + girq->populate_parent_alloc_arg = gpiochip_populate_parent_fwspec_twocell; girq->child_irq_domain_ops.free = rzg2l_gpio_irq_domain_free; girq->init_valid_mask = rzg2l_init_irq_valid_mask;