From patchwork Tue Oct 22 08:24:24 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Biju Das X-Patchwork-Id: 13845281 X-Patchwork-Delegate: kieran@bingham.xyz Received: from relmlie5.idc.renesas.com (relmlor1.renesas.com [210.160.252.171]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 45DCD1714BA for ; Tue, 22 Oct 2024 08:25:04 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.160.252.171 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729585507; cv=none; b=DZswMcqJ/LeX/02ULfiuif4N+b5AIV6caekV1GzCAem6sRriH4BeZ2PxXW6h5n6txFX8aKMJE6fg+U5zI/pozzBKe/G364D8hq8osOcfUpo7ODn0DDpqdUJULgwpdAdSaZGcJ+ldwQ+eZ08muxUYNAXd2MA+K6a2SMib2J4Vp1s= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729585507; c=relaxed/simple; bh=V1++dtSoJmL+8x4dywEDnzZKPGeqBOuWIvuux/U42YE=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=CeHG1kjvEO+bisgzTPJHd8o8d+tr9T0JlrbrwybWXpZQQY4btXjNODkpb1Io/EIe+GISgqsNkrUoJtPPgfAwaKr19/k2y5MppnaxfQCqLWSeKvWyZdn8W3N/skpJb6+kyi9b3vpCKWEBmGRBger9FqwFovyWEZwl63B0R6zGJc8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=bp.renesas.com; spf=pass smtp.mailfrom=bp.renesas.com; arc=none smtp.client-ip=210.160.252.171 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=bp.renesas.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bp.renesas.com X-IronPort-AV: E=Sophos;i="6.11,222,1725289200"; d="scan'208";a="222639851" Received: from unknown (HELO relmlir5.idc.renesas.com) ([10.200.68.151]) by relmlie5.idc.renesas.com with ESMTP; 22 Oct 2024 17:25:03 +0900 Received: from localhost.localdomain (unknown [10.226.92.236]) by relmlir5.idc.renesas.com (Postfix) with ESMTP id EB336400754D; Tue, 22 Oct 2024 17:24:44 +0900 (JST) From: Biju Das To: Biju Das , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter Cc: Tomi Valkeinen , Laurent Pinchart , dri-devel@lists.freedesktop.org, linux-renesas-soc@vger.kernel.org, Geert Uytterhoeven , Prabhakar Mahadev Lad , Biju Das Subject: [PATCH v2 2/2] drm: renesas: rz-du: rzg2l_du_encoder: Fix max dot clock for DPI Date: Tue, 22 Oct 2024 09:24:24 +0100 Message-ID: <20241022082433.32513-3-biju.das.jz@bp.renesas.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20241022082433.32513-1-biju.das.jz@bp.renesas.com> References: <20241022082433.32513-1-biju.das.jz@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-renesas-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 As per the RZ/G2UL hardware manual Table 33.4 Clock List, the maximum dot clock for the DPI interface is 83.5 MHz. Add mode_valid callback to reject modes greater than 83.5 MHz. Suggested-by: Laurent Pinchart Signed-off-by: Biju Das --- Changes in v2: * Moved .mode_valid from crtc to encoder as the new state is not available in crtc and instead, we could check renc->output for .mode_valid() function of drm_encoder. * Dropped rzg2l_du_crtc_atomic_check(). --- .../gpu/drm/renesas/rz-du/rzg2l_du_encoder.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/drivers/gpu/drm/renesas/rz-du/rzg2l_du_encoder.c b/drivers/gpu/drm/renesas/rz-du/rzg2l_du_encoder.c index 339cbaaea0b5..564ab4cb3d37 100644 --- a/drivers/gpu/drm/renesas/rz-du/rzg2l_du_encoder.c +++ b/drivers/gpu/drm/renesas/rz-du/rzg2l_du_encoder.c @@ -10,6 +10,7 @@ #include #include +#include #include #include #include @@ -24,6 +25,22 @@ static const struct drm_encoder_funcs rzg2l_du_encoder_funcs = { }; +static enum drm_mode_status +rzg2l_du_encoder_mode_valid(struct drm_encoder *encoder, + const struct drm_display_mode *mode) +{ + struct rzg2l_du_encoder *renc = to_rzg2l_encoder(encoder); + + if (renc->output == RZG2L_DU_OUTPUT_DPAD0 && mode->clock > 83500) + return MODE_CLOCK_HIGH; + + return MODE_OK; +} + +static const struct drm_encoder_helper_funcs rzg2l_du_encoder_helper_funcs = { + .mode_valid = rzg2l_du_encoder_mode_valid, +}; + int rzg2l_du_encoder_init(struct rzg2l_du_device *rcdu, enum rzg2l_du_output output, struct device_node *enc_node) @@ -48,6 +65,7 @@ int rzg2l_du_encoder_init(struct rzg2l_du_device *rcdu, return PTR_ERR(renc); renc->output = output; + drm_encoder_helper_add(&renc->base, &rzg2l_du_encoder_helper_funcs); /* Attach the bridge to the encoder. */ ret = drm_bridge_attach(&renc->base, bridge, NULL,