From patchwork Mon Jan 27 11:37:03 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Biju Das X-Patchwork-Id: 13951252 X-Patchwork-Delegate: geert@linux-m68k.org Received: from relmlie5.idc.renesas.com (relmlor1.renesas.com [210.160.252.171]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 1AF501FE454 for ; Mon, 27 Jan 2025 11:38:00 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.160.252.171 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1737977882; cv=none; b=Cu/+13bNTzPYkjyK7CRDOq4EooelqTpmR/yyeUf4O2/WYiCLECF5hZb4t0ZjUzP0RKGPiGl8ygskk8qaU1xZRNHAUL2cI9rDZnJ9qAXWKzExq2utrbOYVlKtYHMaaRvWXuzpGkz0MW8iGy4R9anGKnbYLn4xUpYYxvHqBFN+6CM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1737977882; c=relaxed/simple; bh=BoWbW++eLM7qVqV9gMMcltVUC1RT2QUqVhm/UpZCY6w=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Z+lG6mmJ3eIv1ZVFfoSllVmLmHky8YmPEvTB0qZf4DETxg+lNK3RY2cdbzKgmGL7byqiKjXJd913CN2aKjpAeWCa3Zh58KdRbXK3SY0rt8UqQpOWFIA35v7dwaH9czhkbEuIKRfNU6r7FOhonjRF4N4I1jjLbeOrdgO2RQwtZGg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=bp.renesas.com; spf=pass smtp.mailfrom=bp.renesas.com; arc=none smtp.client-ip=210.160.252.171 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=bp.renesas.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bp.renesas.com X-CSE-ConnectionGUID: ilAIkYwkTXqyXNqDuXlV1A== X-CSE-MsgGUID: r3tNEC89QRGEywy4m5oHpw== Received: from unknown (HELO relmlir6.idc.renesas.com) ([10.200.68.152]) by relmlie5.idc.renesas.com with ESMTP; 27 Jan 2025 20:38:00 +0900 Received: from localhost.localdomain (unknown [10.226.94.28]) by relmlir6.idc.renesas.com (Postfix) with ESMTP id 8E14941F25B2; Mon, 27 Jan 2025 20:37:51 +0900 (JST) From: Biju Das To: Thomas Gleixner Cc: Biju Das , Geert Uytterhoeven , Prabhakar Mahadev Lad , Biju Das , linux-renesas-soc@vger.kernel.org, Fabrizio Castro , Tommaso Merciai Subject: [PATCH v2 08/12] irqchip/renesas-rzv2h: Add tssr_k variable to struct rzv2h_hw_info Date: Mon, 27 Jan 2025 11:37:03 +0000 Message-ID: <20250127113723.24479-9-biju.das.jz@bp.renesas.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250127113723.24479-1-biju.das.jz@bp.renesas.com> References: <20250127113723.24479-1-biju.das.jz@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-renesas-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 On RZ/G3E the number of TSSR registers is 15 compared to 8 on RZ/V2H and each TSSR register can program 2 TINTs compared to 4 on RZ/V2H. Add tssr_k variable to struct rzv2h_hw_info to handle this difference and drop the macros ICU_TSSR_K and ICU_TSSR_TSSEL_N. Reviewed-by: Fabrizio Castro Reviewed-by: Tommaso Merciai Signed-off-by: Biju Das --- v1->v2: * Collected tags. --- drivers/irqchip/irq-renesas-rzv2h.c | 13 +++++++------ 1 file changed, 7 insertions(+), 6 deletions(-) diff --git a/drivers/irqchip/irq-renesas-rzv2h.c b/drivers/irqchip/irq-renesas-rzv2h.c index 211da5ab0d7f..cfc1ff6307cb 100644 --- a/drivers/irqchip/irq-renesas-rzv2h.c +++ b/drivers/irqchip/irq-renesas-rzv2h.c @@ -64,8 +64,6 @@ #define ICU_TINT_LEVEL_HIGH 2 #define ICU_TINT_LEVEL_LOW 3 -#define ICU_TSSR_K(tint_nr) ((tint_nr) / 4) -#define ICU_TSSR_TSSEL_N(tint_nr) ((tint_nr) % 4) #define ICU_TSSR_TSSEL_PREP(tssel, n) ((tssel) << ((n) * 8)) #define ICU_TSSR_TSSEL_MASK(n) ICU_TSSR_TSSEL_PREP(0x7F, n) #define ICU_TSSR_TIEN(n) (BIT(7) << ((n) * 8)) @@ -84,10 +82,12 @@ * struct rzv2h_hw_info - Interrupt Control Unit controller hardware info structure. * @t_offs: TINT offset * @max_tssel: TSSEL max value + * @tssr_k: TSSR index k */ struct rzv2h_hw_info { u16 t_offs; u8 max_tssel; + u8 tssr_k; }; /** @@ -145,8 +145,8 @@ static void rzv2h_tint_irq_endisable(struct irq_data *d, bool enable) return; tint_nr = hw_irq - ICU_TINT_START; - k = ICU_TSSR_K(tint_nr); - tssel_n = ICU_TSSR_TSSEL_N(tint_nr); + k = tint_nr / priv->info->tssr_k; + tssel_n = tint_nr % priv->info->tssr_k; guard(raw_spinlock)(&priv->lock); tssr = readl_relaxed(priv->base + priv->info->t_offs + ICU_TSSR(k)); @@ -308,8 +308,8 @@ static int rzv2h_tint_set_type(struct irq_data *d, unsigned int type) hwirq = irqd_to_hwirq(d); tint_nr = hwirq - ICU_TINT_START; - tssr_k = ICU_TSSR_K(tint_nr); - tssel_n = ICU_TSSR_TSSEL_N(tint_nr); + tssr_k = tint_nr / priv->info->tssr_k; + tssel_n = tint_nr % priv->info->tssr_k; titsr_k = ICU_TITSR_K(tint_nr); titsel_n = ICU_TITSR_TITSEL_N(tint_nr); @@ -516,6 +516,7 @@ static int rzv2h_icu_init_common(struct device_node *node, struct device_node *p static const struct rzv2h_hw_info rzv2h_hw_params = { .t_offs = 0, .max_tssel = ICU_RZV2H_TSSEL_MAX_VAL, + .tssr_k = 4, }; static int rzv2h_icu_init(struct device_node *node, struct device_node *parent)