diff mbox series

[v3,11/13] irqchip/renesas-rzv2h: Add tien variable to struct rzv2h_hw_info

Message ID 20250128104714.80807-12-biju.das.jz@bp.renesas.com (mailing list archive)
State New
Delegated to: Geert Uytterhoeven
Headers show
Series Add Support for RZ/G3E ICU | expand

Commit Message

Biju Das Jan. 28, 2025, 10:47 a.m. UTC 
The TINT enable position on RZ/G3E is BIT 15 compared to BIT 8 on RZ/V2H.
Add tien variable to struct rzv2h_hw_info to simplify the calculations
when we add support for RZ/G3E and drop the macro ICU_TSSR_TIEN.

Reviewed-by: Fabrizio Castro <fabrizio.castro.jz@renesas.com>
Reviewed-by: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com>
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
v2->v3:
 * No change
v1->v2:
 * Collected tags.
---
 drivers/irqchip/irq-renesas-rzv2h.c | 11 ++++++-----
 1 file changed, 6 insertions(+), 5 deletions(-)
diff mbox series

Patch

diff --git a/drivers/irqchip/irq-renesas-rzv2h.c b/drivers/irqchip/irq-renesas-rzv2h.c
index fbc6d79e09d9..ec6e49d248d7 100644
--- a/drivers/irqchip/irq-renesas-rzv2h.c
+++ b/drivers/irqchip/irq-renesas-rzv2h.c
@@ -64,8 +64,6 @@ 
 #define ICU_TINT_LEVEL_HIGH			2
 #define ICU_TINT_LEVEL_LOW			3
 
-#define ICU_TSSR_TIEN(n)			(BIT(7) << ((n) * 8))
-
 #define ICU_TITSR_K(tint_nr)			((tint_nr) / 16)
 #define ICU_TITSR_TITSEL_N(tint_nr)		((tint_nr) % 16)
 #define ICU_TITSR_TITSEL_PREP(titsel, n)	ICU_IITSR_IITSEL_PREP(titsel, n)
@@ -79,6 +77,7 @@ 
 /**
  * struct rzv2h_hw_info - Interrupt Control Unit controller hardware info structure.
  * @t_offs:		TINT offset
+ * @tien:		TIEN mask
  * @tssel_mask:		TSSEL mask
  * @tssel_shift:	TSSEL shift
  * @max_tssel:		TSSEL max value
@@ -86,6 +85,7 @@ 
  */
 struct rzv2h_hw_info {
 	u16		t_offs;
+	u16		tien;
 	u16		tssel_mask;
 	u8		tssel_shift;
 	u8		max_tssel;
@@ -153,9 +153,9 @@  static void rzv2h_tint_irq_endisable(struct irq_data *d, bool enable)
 	guard(raw_spinlock)(&priv->lock);
 	tssr = readl_relaxed(priv->base + priv->info->t_offs + ICU_TSSR(k));
 	if (enable)
-		tssr |= ICU_TSSR_TIEN(tssel_n);
+		tssr |= priv->info->tien << (tssel_n * priv->info->tssel_shift);
 	else
-		tssr &= ~ICU_TSSR_TIEN(tssel_n);
+		tssr &= ~(priv->info->tien << (tssel_n * priv->info->tssel_shift));
 	writel_relaxed(tssr, priv->base + priv->info->t_offs + ICU_TSSR(k));
 }
 
@@ -315,7 +315,7 @@  static int rzv2h_tint_set_type(struct irq_data *d, unsigned int type)
 
 	titsr_k = ICU_TITSR_K(tint_nr);
 	titsel_n = ICU_TITSR_TITSEL_N(tint_nr);
-	tien = ICU_TSSR_TIEN(titsel_n);
+	tien = priv->info->tien << (titsel_n * priv->info->tssel_shift);
 
 	guard(raw_spinlock)(&priv->lock);
 
@@ -520,6 +520,7 @@  static int rzv2h_icu_init_common(struct device_node *node, struct device_node *p
 
 static const struct rzv2h_hw_info rzv2h_hw_params = {
 	.t_offs		= 0,
+	.tien		= BIT(7),
 	.tssel_mask	= GENMASK(6, 0),
 	.tssel_shift	= 8,
 	.max_tssel	= ICU_RZV2H_TSSEL_MAX_VAL,