From patchwork Mon Feb 17 10:52:14 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Bultel X-Patchwork-Id: 13977577 X-Patchwork-Delegate: geert@linux-m68k.org Received: from relmlie6.idc.renesas.com (relmlor2.renesas.com [210.160.252.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 7AC0D21771D; Mon, 17 Feb 2025 10:55:33 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.160.252.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739789735; cv=none; b=c5EbprvCJqZZqnvkM172ng69zkAwl2slhuJEp4v9rKk+g7V319urjInhSPh2ay3xfjLEtTy6KRBUDuNjFrkbWhFF8q28Xjgl1LN9vw0A1WDDXkyUgtAolMAxqrAkm1ZS/uHZfgLdeop5tFo3uI3cAFr6k3fZkjH7vEmec0ko8/w= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739789735; c=relaxed/simple; bh=8/hLp1De/hRlppI3VWgvObha8u0xSfjd/kTIm02maQE=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=ZB6v9klgfY7l23wmu5RQmMICAHPmjfig/Z/efsGja9luOlYnsH4UmhVa+n/x/ljTWGZngU25vRbZtmnGbVr7OQdxm2Qwa2C/z697UDcYZSxB6MmFL5qDDrdRCjFsP+xneP94HXM2WMtYalARgr/TiWrxqEyNngqfCMMx+BKCU4o= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=bp.renesas.com; spf=pass smtp.mailfrom=bp.renesas.com; arc=none smtp.client-ip=210.160.252.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=bp.renesas.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bp.renesas.com X-CSE-ConnectionGUID: dH1SiHvuTcqhKOIHg+ullQ== X-CSE-MsgGUID: pBJC6dxFRmaq9ePj81h7vA== Received: from unknown (HELO relmlir6.idc.renesas.com) ([10.200.68.152]) by relmlie6.idc.renesas.com with ESMTP; 17 Feb 2025 19:55:32 +0900 Received: from superbuilder.administration.lan (unknown [10.226.93.254]) by relmlir6.idc.renesas.com (Postfix) with ESMTP id D0FC84280572; Mon, 17 Feb 2025 19:55:29 +0900 (JST) From: Thierry Bultel To: thierry.bultel@linatsea.fr, Catalin Marinas , Will Deacon Cc: linux-renesas-soc@vger.kernel.org, Thierry Bultel , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 13/13] defconfig: Enable RZ/T2H Soc and RZ_SCI Date: Mon, 17 Feb 2025 11:52:14 +0100 Message-ID: <20250217105354.551788-14-thierry.bultel.yh@bp.renesas.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250217105354.551788-1-thierry.bultel.yh@bp.renesas.com> References: <20250217105354.551788-1-thierry.bultel.yh@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-renesas-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Signed-off-by: Thierry Bultel --- arch/arm64/configs/defconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index c62831e61586..a1cc7a37386d 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -486,6 +486,7 @@ CONFIG_SERIAL_TEGRA_TCU=y CONFIG_SERIAL_IMX=y CONFIG_SERIAL_IMX_CONSOLE=y CONFIG_SERIAL_SH_SCI=y +CONFIG_SERIAL_RZ_SCI=y CONFIG_SERIAL_MSM=y CONFIG_SERIAL_MSM_CONSOLE=y CONFIG_SERIAL_QCOM_GENI=y @@ -1457,6 +1458,7 @@ CONFIG_ARCH_R9A07G054=y CONFIG_ARCH_R9A08G045=y CONFIG_ARCH_R9A09G011=y CONFIG_ARCH_R9A09G057=y +CONFIG_ARCH_R9A09G077=y CONFIG_ROCKCHIP_IODOMAIN=y CONFIG_ARCH_TEGRA_132_SOC=y CONFIG_ARCH_TEGRA_210_SOC=y