| Message ID | 20250217105354.551788-8-thierry.bultel.yh@bp.renesas.com (mailing list archive) |
|---|---|
| State | Under Review |
| Delegated to: | Geert Uytterhoeven |
| Headers | show |
| Series | add initial support for Renesas RZ/T2H SoC | expand |
On 17/02/2025 10:52, Thierry Bultel wrote: > The comment was correct when it was added, at that time RZ/T1 was > the only SoC in the RZ/T line. Since then, further SoCs have been > added with RZ/T names which do not use the same SCIFA register > layout and so the comment is now misleading. > > So we update the comment to explicitly reference only RZ/T1 SoCs. > > Signed-off-by: Thierry Bultel <thierry.bultel.yh@bp.renesas.com> > --- > drivers/tty/serial/sh-sci.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c > index 924b803af440..b8f9034f891a 100644 > --- a/drivers/tty/serial/sh-sci.c > +++ b/drivers/tty/serial/sh-sci.c > @@ -291,7 +291,7 @@ static const struct sci_port_params sci_port_params[SCIx_NR_REGTYPES] = { > }, > > /* > - * The "SCIFA" that is in RZ/A2, RZ/G2L and RZ/T. > + * The "SCIFA" that is in RZ/A2, RZ/G2L and RZ/T1. > * It looks like a normal SCIF with FIFO data, but with a > * compressed address space. Also, the break out of interrupts > * are different: ERI/BRI, RXI, TXI, TEI, DRI. Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c index 924b803af440..b8f9034f891a 100644 --- a/drivers/tty/serial/sh-sci.c +++ b/drivers/tty/serial/sh-sci.c @@ -291,7 +291,7 @@ static const struct sci_port_params sci_port_params[SCIx_NR_REGTYPES] = { }, /* - * The "SCIFA" that is in RZ/A2, RZ/G2L and RZ/T. + * The "SCIFA" that is in RZ/A2, RZ/G2L and RZ/T1. * It looks like a normal SCIF with FIFO data, but with a * compressed address space. Also, the break out of interrupts * are different: ERI/BRI, RXI, TXI, TEI, DRI.
The comment was correct when it was added, at that time RZ/T1 was the only SoC in the RZ/T line. Since then, further SoCs have been added with RZ/T names which do not use the same SCIFA register layout and so the comment is now misleading. So we update the comment to explicitly reference only RZ/T1 SoCs. Signed-off-by: Thierry Bultel <thierry.bultel.yh@bp.renesas.com> --- drivers/tty/serial/sh-sci.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)