From patchwork Wed Feb 26 13:09:32 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Bultel X-Patchwork-Id: 13992377 X-Patchwork-Delegate: geert@linux-m68k.org Received: from relmlie6.idc.renesas.com (relmlor2.renesas.com [210.160.252.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 00F7D21D3FE; Wed, 26 Feb 2025 13:10:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.160.252.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740575448; cv=none; b=qzjkzL9EkoyfBSp4KBhPSaTEIDZCDuNGLH1v2eklV0GU5HEpQGCpJoRZcpKrK0WGY2bPAWPe0JDz91J0Yz5M7q/lY5mqnLOJ/4bB38Wk3t3Qx+RuHpe5DWUFfhsOl9ZZn95wWEf7Rq9vuzRzPNs3GllVgEyi48uHsNGqG4zlejM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740575448; c=relaxed/simple; bh=4JYazlCOq2dcCCVPNmW8lQHwQF/+8ey4CxwJoO2QP9s=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=kDnKF/QR5PDfJaG1brVVJb5iiNhW0Kk4aDpXVZr3VCgDZ1/nYUnvGtrwG9f33wggXOj/jZJ1oCz90A3ceyPOYZgi7GXEndOSzb16w68dJpg69bg9iNIsWnlYywhz1nzR7Yv2mvfhCTZygO4QJgp421lIUAjaJt/kwGX3hS2SZTY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=bp.renesas.com; spf=pass smtp.mailfrom=bp.renesas.com; arc=none smtp.client-ip=210.160.252.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=bp.renesas.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bp.renesas.com X-CSE-ConnectionGUID: nMnONU71QR2Y77Gk38N7hQ== X-CSE-MsgGUID: A4YRXTTeQqKcuV1ALuUGsg== Received: from unknown (HELO relmlir5.idc.renesas.com) ([10.200.68.151]) by relmlie6.idc.renesas.com with ESMTP; 26 Feb 2025 22:10:46 +0900 Received: from superbuilder.administration.lan (unknown [10.226.92.221]) by relmlir5.idc.renesas.com (Postfix) with ESMTP id 31E4F406960C; Wed, 26 Feb 2025 22:10:43 +0900 (JST) From: Thierry Bultel To: thierry.bultel@linatsea.fr Cc: linux-renesas-soc@vger.kernel.org, geert@linux-m68k.org, paul.barker.ct@bp.renesas.com, Thierry Bultel , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 13/13] arm64: defconfig: Enable Renesas RZ/T2H SoC option Date: Wed, 26 Feb 2025 14:09:32 +0100 Message-ID: <20250226130935.3029927-14-thierry.bultel.yh@bp.renesas.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250226130935.3029927-1-thierry.bultel.yh@bp.renesas.com> References: <20250226130935.3029927-1-thierry.bultel.yh@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-renesas-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Selects support for RZ/T2H (aka r9a09g077), and SCI (serial) specific code for it. Signed-off-by: Thierry Bultel Reviewed-by: Paul Barker --- arch/arm64/configs/defconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index cb7da4415599..f7be1bbc5661 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -492,6 +492,7 @@ CONFIG_SERIAL_TEGRA_TCU=y CONFIG_SERIAL_IMX=y CONFIG_SERIAL_IMX_CONSOLE=y CONFIG_SERIAL_SH_SCI=y +CONFIG_SERIAL_RZ_SCI=y CONFIG_SERIAL_MSM=y CONFIG_SERIAL_MSM_CONSOLE=y CONFIG_SERIAL_QCOM_GENI=y @@ -1484,6 +1485,7 @@ CONFIG_ARCH_R9A08G045=y CONFIG_ARCH_R9A09G011=y CONFIG_ARCH_R9A09G047=y CONFIG_ARCH_R9A09G057=y +CONFIG_ARCH_R9A09G077=y CONFIG_ROCKCHIP_IODOMAIN=y CONFIG_ARCH_TEGRA_132_SOC=y CONFIG_ARCH_TEGRA_210_SOC=y