| Message ID | 21f556eb7e903d5b9f4c96188fd4b6ae0db71856.1718890849.git.geert+renesas@glider.be (mailing list archive) |
|---|---|
| State | Mainlined |
| Commit | a0bc9f2b7cda02d5df788bba47340e4f3c418bd7 |
| Delegated to: | Geert Uytterhoeven |
| Headers | show |
| Series | dts: renesas: Add missing hypervisor virtual timer IRQs and interrupt-names | expand |
On Thu, Jun 20, 2024 at 3:01 PM Geert Uytterhoeven <geert+renesas@glider.be> wrote: > > Add the missing fifth interrupt to the device node that represents the > ARM architected timer. While at it, add an interrupt-names property for > clarity, > > Fixes: 68a45525297b2e9a ("arm64: dts: renesas: Add initial DTSI for RZ/G2{L,LC} SoC's") > Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> > --- > arch/arm64/boot/dts/renesas/r9a07g044.dtsi | 5 ++++- > 1 file changed, 4 insertions(+), 1 deletion(-) > Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Cheers, Prabhakar > diff --git a/arch/arm64/boot/dts/renesas/r9a07g044.dtsi b/arch/arm64/boot/dts/renesas/r9a07g044.dtsi > index c07ddd8124e6804c..d3838e5820fca19f 100644 > --- a/arch/arm64/boot/dts/renesas/r9a07g044.dtsi > +++ b/arch/arm64/boot/dts/renesas/r9a07g044.dtsi > @@ -1334,6 +1334,9 @@ timer { > interrupts-extended = <&gic GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>, > <&gic GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>, > <&gic GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>, > - <&gic GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>; > + <&gic GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>, > + <&gic GIC_PPI 12 IRQ_TYPE_LEVEL_LOW>; > + interrupt-names = "sec-phys", "phys", "virt", "hyp-phys", > + "hyp-virt"; > }; > }; > -- > 2.34.1 > >
diff --git a/arch/arm64/boot/dts/renesas/r9a07g044.dtsi b/arch/arm64/boot/dts/renesas/r9a07g044.dtsi index c07ddd8124e6804c..d3838e5820fca19f 100644 --- a/arch/arm64/boot/dts/renesas/r9a07g044.dtsi +++ b/arch/arm64/boot/dts/renesas/r9a07g044.dtsi @@ -1334,6 +1334,9 @@ timer { interrupts-extended = <&gic GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>, <&gic GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>, <&gic GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>, - <&gic GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>; + <&gic GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>, + <&gic GIC_PPI 12 IRQ_TYPE_LEVEL_LOW>; + interrupt-names = "sec-phys", "phys", "virt", "hyp-phys", + "hyp-virt"; }; };
Add the missing fifth interrupt to the device node that represents the ARM architected timer. While at it, add an interrupt-names property for clarity, Fixes: 68a45525297b2e9a ("arm64: dts: renesas: Add initial DTSI for RZ/G2{L,LC} SoC's") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> --- arch/arm64/boot/dts/renesas/r9a07g044.dtsi | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-)