| Message ID | 2fe3c8e38b566de09e49056c62fa954ed306a497.1715956819.git.geert+renesas@glider.be (mailing list archive) |
|---|---|
| State | Superseded |
| Delegated to: | Geert Uytterhoeven |
| Headers | show |
| Series | *arm64: Add CAN-FD support for R-Car V4M and Gray Hawk Single | expand |
On Fri, May 17, 2024 at 4:57 PM Geert Uytterhoeven <geert+renesas@glider.be> wrote: > Enable CAN-FD channels 0 and 1 on the Gray Hawk Single development > board: > - Channel 0 uses an NXP TJR1443AT CAN transceiver, which must be > enabled through a GPIO, > - Channel 1 uses a Microchip MCP2558FD-H/SN CAN transceiver, which > does not need explicit description. > > Inspired by a patch for Gray Hawk in the BSP by Duy Nguyen. > > Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> > --- > Changes compared to the BSP: > - Add can_clk, > - Add missing can_transceiver0, > - Keep channels 2 and 3 disabled, > - Preserve sort order. > --- a/arch/arm64/boot/dts/renesas/r8a779h0-gray-hawk-single.dts > +++ b/arch/arm64/boot/dts/renesas/r8a779h0-gray-hawk-single.dts > @@ -75,6 +82,24 @@ phy0: ethernet-phy@0 { > }; > }; > > +&can_clk { > + clock-frequency = <40000000>; > +}; > + > +&canfd { > + pinctrl-0 = <&canfd0_pins>, <&canfd1_pins>, <&can_clk_pins>; This lacks pinctrl-names = "default"; (the BSP did have that, but it was badly indented, and accidentally removed while disabling channels 2 and 3). Unfortunately adding the missing line doesn't help: ( sleep 1; cansend can1 '5A1#11.2233.44556677.88') & candump can0 doesn't do anything. ( sleep 1; cansend can0 '5A1#11.2233.44556677.88') & candump can1 triggers: rcar_canfd e6660000.can can0: bus-off > + status = "okay"; > + > + channel0 { > + status = "okay"; > + phys = <&can_transceiver0>; > + }; > + > + channel1 { > + status = "okay"; > + }; > +}; Gr{oetje,eeting}s, Geert
diff --git a/arch/arm64/boot/dts/renesas/r8a779h0-gray-hawk-single.dts b/arch/arm64/boot/dts/renesas/r8a779h0-gray-hawk-single.dts index cfbe8c8680cd8947..294ed2d5a17cbfd5 100644 --- a/arch/arm64/boot/dts/renesas/r8a779h0-gray-hawk-single.dts +++ b/arch/arm64/boot/dts/renesas/r8a779h0-gray-hawk-single.dts @@ -22,6 +22,13 @@ aliases { ethernet0 = &avb0; }; + can_transceiver0: can-phy0 { + compatible = "nxp,tjr1443"; + #phy-cells = <0>; + enable-gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>; + max-bitrate = <5000000>; + }; + chosen { bootargs = "ignore_loglevel rw root=/dev/nfs ip=on"; stdout-path = "serial0:921600n8"; @@ -75,6 +82,24 @@ phy0: ethernet-phy@0 { }; }; +&can_clk { + clock-frequency = <40000000>; +}; + +&canfd { + pinctrl-0 = <&canfd0_pins>, <&canfd1_pins>, <&can_clk_pins>; + status = "okay"; + + channel0 { + status = "okay"; + phys = <&can_transceiver0>; + }; + + channel1 { + status = "okay"; + }; +}; + &extal_clk { clock-frequency = <16666666>; }; @@ -174,6 +199,21 @@ pins_mii { }; }; + can_clk_pins: can-clk { + groups = "can_clk"; + function = "can_clk"; + }; + + canfd0_pins: canfd0 { + groups = "canfd0_data"; + function = "canfd0"; + }; + + canfd1_pins: canfd1 { + groups = "canfd1_data"; + function = "canfd1"; + }; + hscif0_pins: hscif0 { groups = "hscif0_data", "hscif0_ctrl"; function = "hscif0";
Enable CAN-FD channels 0 and 1 on the Gray Hawk Single development board: - Channel 0 uses an NXP TJR1443AT CAN transceiver, which must be enabled through a GPIO, - Channel 1 uses a Microchip MCP2558FD-H/SN CAN transceiver, which does not need explicit description. Inspired by a patch for Gray Hawk in the BSP by Duy Nguyen. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> --- Changes compared to the BSP: - Add can_clk, - Add missing can_transceiver0, - Keep channels 2 and 3 disabled, - Preserve sort order. --- .../dts/renesas/r8a779h0-gray-hawk-single.dts | 40 +++++++++++++++++++ 1 file changed, 40 insertions(+)