Message ID | 40786877.3MNoIeTZcz@wasted.cogentembedded.com (mailing list archive) |
---|---|
State | Accepted |
Commit | 4b9b7b3a2c91e1ebf8be9c7efd4839b91d66e87e |
Headers | show |
On Mon, Jul 11, 2016 at 11:51 PM, Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> wrote: > Despite the QSPI clock has PLL1/VCOx1/4 clock as a parent, the latter > hasn't been added to the R8A7792 device tree -- fix this overlook at > last... > > Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
Index: renesas/arch/arm/boot/dts/r8a7792.dtsi =================================================================== --- renesas.orig/arch/arm/boot/dts/r8a7792.dtsi +++ renesas/arch/arm/boot/dts/r8a7792.dtsi @@ -469,6 +469,13 @@ }; /* Fixed factor clocks */ + pll1_div2_clk: pll1_div2 { + compatible = "fixed-factor-clock"; + clocks = <&cpg_clocks R8A7792_CLK_PLL1>; + #clock-cells = <0>; + clock-div = <2>; + clock-mult = <1>; + }; zs_clk: zs { compatible = "fixed-factor-clock"; clocks = <&cpg_clocks R8A7792_CLK_PLL1>;
Despite the QSPI clock has PLL1/VCOx1/4 clock as a parent, the latter hasn't been added to the R8A7792 device tree -- fix this overlook at last... Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> --- arch/arm/boot/dts/r8a7792.dtsi | 7 +++++++ 1 file changed, 7 insertions(+)