Message ID | 55392eb8-e050-09d0-22d8-87da114fe691@cogentembedded.com (mailing list archive) |
---|---|
State | Deferred |
Delegated to: | Simon Horman |
Headers | show |
Index: renesas/arch/arm64/boot/dts/renesas/r8a77980.dtsi =================================================================== --- renesas.orig/arch/arm64/boot/dts/renesas/r8a77980.dtsi +++ renesas/arch/arm64/boot/dts/renesas/r8a77980.dtsi @@ -164,6 +171,17 @@ status = "disabled"; }; + pcie_phy: pcie-phy@e65d0000 { + compatible = "renesas,r8a77980-pcie-phy", + "renesas,rcar-gen3-pcie-phy"; + reg = <0 0xe65d0000 0 0x8000>; + #phy-cells = <0>; + clocks = <&cpg CPG_MOD 319>; + power-domains = <&sysc 32>; + resets = <&cpg 319>; + status = "disabled"; + }; + avb: ethernet@e6800000 { compatible = "renesas,etheravb-r8a77980", "renesas,etheravb-rcar-gen3";
Describe the PCIe PHY in the R8A77980 device tree; it will be used by PCIEC in the next patch... Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> --- arch/arm64/boot/dts/renesas/r8a77980.dtsi | 50 ++++++++++++++++++++++++++++++ 1 file changed, 50 insertions(+)