| Message ID | 5cf82cb1-0278-010c-165d-07dbcbe0878d@cogentembedded.com (mailing list archive) |
|---|---|
| State | Superseded |
| Delegated to: | Simon Horman |
| Headers | show |
Hi Sergei, On Fri, Feb 16, 2018 at 7:35 PM, Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> wrote: > Add the initial device tree for the R8A77980 SoC based Condor board. > The board has 1 debug serial port (SCIF0); include support for it, so > that the serial console can work. > > Based on the original (and large) patch by Vladimir Barinov. > > Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> > Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> > Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> > > --- > Changes in version 2: > - removed the useless "status" property from the SCIF_CLK node; > - fixed the memory size; > - added Geert's tag. > --- /dev/null > +++ renesas/arch/arm64/boot/dts/renesas/r8a77980-condor.dts > @@ -0,0 +1,45 @@ > +// SPDX-License-Identifier: GPL-2.0 > +/* > + * Device Tree Source for the Condor board > + * > + * Copyright (C) 2018 Renesas Electronics Corp. > + * Copyright (C) 2018 Cogent Embedded, Inc. > + */ > + > +/dts-v1/; > +#include "r8a77980.dtsi" > + > +/ { > + model = "Renesas Condor board based on r8a77980"; > + compatible = "renesas,condor", "renesas,r8a77980"; > + > + aliases { > + serial0 = &scif0; > + }; > + > + chosen { > + stdout-path = "serial0:115200n8"; > + }; > + > + memory@48000000 { > + device_type = "memory"; > + /* first 128MB is reserved for secure area. */ > + reg = <0 0x48000000 0 0xb8000000>; Shouldn't the size be 0x78000000, or is there really 3 GiB of RAM? oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
Hello! On 2/19/2018 11:30 AM, Geert Uytterhoeven wrote: >> Add the initial device tree for the R8A77980 SoC based Condor board. >> The board has 1 debug serial port (SCIF0); include support for it, so >> that the serial console can work. >> >> Based on the original (and large) patch by Vladimir Barinov. >> >> Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> >> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> >> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> >> >> --- >> Changes in version 2: >> - removed the useless "status" property from the SCIF_CLK node; >> - fixed the memory size; >> - added Geert's tag. > >> --- /dev/null >> +++ renesas/arch/arm64/boot/dts/renesas/r8a77980-condor.dts >> @@ -0,0 +1,45 @@ >> +// SPDX-License-Identifier: GPL-2.0 >> +/* >> + * Device Tree Source for the Condor board >> + * >> + * Copyright (C) 2018 Renesas Electronics Corp. >> + * Copyright (C) 2018 Cogent Embedded, Inc. >> + */ >> + >> +/dts-v1/; >> +#include "r8a77980.dtsi" >> + >> +/ { >> + model = "Renesas Condor board based on r8a77980"; >> + compatible = "renesas,condor", "renesas,r8a77980"; >> + >> + aliases { >> + serial0 = &scif0; >> + }; >> + >> + chosen { >> + stdout-path = "serial0:115200n8"; >> + }; >> + >> + memory@48000000 { >> + device_type = "memory"; >> + /* first 128MB is reserved for secure area. */ >> + reg = <0 0x48000000 0 0xb8000000>; > > Shouldn't the size be 0x78000000, or is there really 3 GiB of RAM? Ugh, so I finally mixed up limit and size... :-/ > oetje,eeting}s, > > Geert MBR, Sergei
Index: renesas/arch/arm64/boot/dts/renesas/Makefile =================================================================== --- renesas.orig/arch/arm64/boot/dts/renesas/Makefile +++ renesas/arch/arm64/boot/dts/renesas/Makefile @@ -8,4 +8,5 @@ dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-sa dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-m3ulcb-kf.dtb dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-salvator-xs.dtb dtb-$(CONFIG_ARCH_R8A77970) += r8a77970-eagle.dtb r8a77970-v3msk.dtb +dtb-$(CONFIG_ARCH_R8A77980) += r8a77980-condor.dtb dtb-$(CONFIG_ARCH_R8A77995) += r8a77995-draak.dtb Index: renesas/arch/arm64/boot/dts/renesas/r8a77980-condor.dts =================================================================== --- /dev/null +++ renesas/arch/arm64/boot/dts/renesas/r8a77980-condor.dts @@ -0,0 +1,45 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Device Tree Source for the Condor board + * + * Copyright (C) 2018 Renesas Electronics Corp. + * Copyright (C) 2018 Cogent Embedded, Inc. + */ + +/dts-v1/; +#include "r8a77980.dtsi" + +/ { + model = "Renesas Condor board based on r8a77980"; + compatible = "renesas,condor", "renesas,r8a77980"; + + aliases { + serial0 = &scif0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + memory@48000000 { + device_type = "memory"; + /* first 128MB is reserved for secure area. */ + reg = <0 0x48000000 0 0xb8000000>; + }; +}; + +&extal_clk { + clock-frequency = <16666666>; +}; + +&extalr_clk { + clock-frequency = <32768>; +}; + +&scif0 { + status = "okay"; +}; + +&scif_clk { + clock-frequency = <14745600>; +};