From patchwork Thu Jun 20 13:57:31 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Geert Uytterhoeven X-Patchwork-Id: 13705562 X-Patchwork-Delegate: geert@linux-m68k.org Received: from xavier.telenet-ops.be (xavier.telenet-ops.be [195.130.132.52]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 969241AE0A9 for ; Thu, 20 Jun 2024 13:57:49 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=195.130.132.52 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1718891872; cv=none; b=J+fnV3ca/yt5qhsuTlEw8UPBFVEPEgD4p0YB8ANh+SKVGxH3uGfeYEmhei8JlnHGVud0hbTXQhRDBgQoA4fXe0O9ELb/sQXhguDh7mkLfkg1Mg11B1nuLbeA9LCGVdF4reguFxEFcn02XFQAn9km5ie3F7TNX68UQRHKuCmB61A= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1718891872; c=relaxed/simple; bh=FztDS2O8Pp/Et4r0TpkZuhKQZhiW8X89KNuZKI3pLqw=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=vFH9klaXM8X6lSWhTdJO+RUls92VgvzFg9JcYMjxnKElHhrnZmUjyTO3q6/G4GBDtJUVJ8I8PzfzxtPN9snbPsoCExCzcf+mzXL4p3xAfkdSnhHFJvoNBFSw2I1ZbfYLLO2Y/kOZHm5S4FgyUvlYkWCc4oaFY3+h7qu19qa1ws0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=glider.be; spf=none smtp.mailfrom=linux-m68k.org; arc=none smtp.client-ip=195.130.132.52 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=glider.be Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux-m68k.org Received: from ramsan.of.borg ([IPv6:2a02:1810:ac12:ed80:260f:cd5c:91b1:523c]) by xavier.telenet-ops.be with bizsmtp id dpxm2C0030Y0hZi01pxm6o; Thu, 20 Jun 2024 15:57:47 +0200 Received: from rox.of.borg ([192.168.97.57]) by ramsan.of.borg with esmtp (Exim 4.95) (envelope-from ) id 1sKIIL-00057p-Ur; Thu, 20 Jun 2024 15:57:45 +0200 Received: from geert by rox.of.borg with local (Exim 4.95) (envelope-from ) id 1sKIIL-000Cop-Rs; Thu, 20 Jun 2024 15:57:45 +0200 From: Geert Uytterhoeven To: Magnus Damm , Yoshihiro Shimoda , Lad Prabhakar , Biju Das , Claudiu Beznea Cc: Mark Rutland , Marc Zyngier , linux-renesas-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, Geert Uytterhoeven Subject: [PATCH 1/9] arm64: dts: renesas: r8a779a0: Add missing hypervisor virtual timer IRQ Date: Thu, 20 Jun 2024 15:57:31 +0200 Message-Id: <671416fb31e3992101c32fe7e46147fe4cd623ae.1718890849.git.geert+renesas@glider.be> X-Mailer: git-send-email 2.34.1 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-renesas-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Add the missing fifth interrupt to the device node that represents the ARM architected timer. While at it, add an interrupt-names property for clarity, Fixes: 834c310f541839b6 ("arm64: dts: renesas: Add Renesas R8A779A0 SoC support") Signed-off-by: Geert Uytterhoeven --- arch/arm64/boot/dts/renesas/r8a779a0.dtsi | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/renesas/r8a779a0.dtsi b/arch/arm64/boot/dts/renesas/r8a779a0.dtsi index 1abe92c98358eddb..395f8d43ce2db92d 100644 --- a/arch/arm64/boot/dts/renesas/r8a779a0.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a779a0.dtsi @@ -2927,6 +2927,9 @@ timer { interrupts-extended = <&gic GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>, <&gic GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>, <&gic GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>, - <&gic GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>; + <&gic GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>, + <&gic GIC_PPI 12 IRQ_TYPE_LEVEL_LOW>; + interrupt-names = "sec-phys", "phys", "virt", "hyp-phys", + "hyp-virt"; }; };