| Message ID | 6c709d2c7776b2b31e127b14c2127195732c592e.1690382328.git.geert+renesas@glider.be (mailing list archive) |
|---|---|
| State | Superseded |
| Delegated to: | Geert Uytterhoeven |
| Headers | show |
| Series | arm64: renesas: r8a779f0: Add INTC-EX support | expand |
Quoting Geert Uytterhoeven (2023-07-26 15:44:42) > Add the device node for the Interrupt Controller for External Devices > (INTC-EX) on the Renesas R-Car S4-8 (R8A779F0) SoC, which serves > external IRQ pins IRQ[0-5]. Well, I believe we have at least validated the core intc_ex with the test in 3/3... so Tested-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com> Reviewed-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com> > Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> > --- > arch/arm64/boot/dts/renesas/r8a779f0.dtsi | 15 +++++++++++++++ > 1 file changed, 15 insertions(+) > > diff --git a/arch/arm64/boot/dts/renesas/r8a779f0.dtsi b/arch/arm64/boot/dts/renesas/r8a779f0.dtsi > index 1d5426e6293c5616..0059c9c580f3f9ef 100644 > --- a/arch/arm64/boot/dts/renesas/r8a779f0.dtsi > +++ b/arch/arm64/boot/dts/renesas/r8a779f0.dtsi > @@ -466,6 +466,21 @@ tsc: thermal@e6198000 { > #thermal-sensor-cells = <1>; > }; > > + intc_ex: interrupt-controller@e61c0000 { > + compatible = "renesas,intc-ex-r8a779f0", "renesas,irqc"; > + #interrupt-cells = <2>; > + interrupt-controller; > + reg = <0 0xe61c0000 0 0x200>; > + interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&cpg CPG_CORE R8A779F0_CLK_CL16M>; > + power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>; > + }; > + > tmu0: timer@e61e0000 { > compatible = "renesas,tmu-r8a779f0", "renesas,tmu"; > reg = <0 0xe61e0000 0 0x30>; > -- > 2.34.1 >
diff --git a/arch/arm64/boot/dts/renesas/r8a779f0.dtsi b/arch/arm64/boot/dts/renesas/r8a779f0.dtsi index 1d5426e6293c5616..0059c9c580f3f9ef 100644 --- a/arch/arm64/boot/dts/renesas/r8a779f0.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a779f0.dtsi @@ -466,6 +466,21 @@ tsc: thermal@e6198000 { #thermal-sensor-cells = <1>; }; + intc_ex: interrupt-controller@e61c0000 { + compatible = "renesas,intc-ex-r8a779f0", "renesas,irqc"; + #interrupt-cells = <2>; + interrupt-controller; + reg = <0 0xe61c0000 0 0x200>; + interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_CORE R8A779F0_CLK_CL16M>; + power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>; + }; + tmu0: timer@e61e0000 { compatible = "renesas,tmu-r8a779f0", "renesas,tmu"; reg = <0 0xe61e0000 0 0x30>;
Add the device node for the Interrupt Controller for External Devices (INTC-EX) on the Renesas R-Car S4-8 (R8A779F0) SoC, which serves external IRQ pins IRQ[0-5]. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> --- arch/arm64/boot/dts/renesas/r8a779f0.dtsi | 15 +++++++++++++++ 1 file changed, 15 insertions(+)