| Message ID | 8030361.FnpbGzHVP8@wasted.cogentembedded.com (mailing list archive) |
|---|---|
| State | Accepted |
| Commit | ce01b14ecf19a18cd95e698f915f5ea582086c21 |
| Headers | show |
On Tue, Jul 12, 2016 at 11:11 PM, Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> wrote: > Define the generic R8A7792 part of the SDHI0 device node. > > Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> > --- > arch/arm/boot/dts/r8a7792.dtsi | 12 ++++++++++++ > 1 file changed, 12 insertions(+) > > Index: renesas/arch/arm/boot/dts/r8a7792.dtsi > =================================================================== > --- renesas.orig/arch/arm/boot/dts/r8a7792.dtsi > +++ renesas/arch/arm/boot/dts/r8a7792.dtsi > @@ -435,6 +435,18 @@ > status = "disabled"; > }; > > + sdhi0: sd@ee100000 { > + compatible = "renesas,sdhi-r8a7792"; > + reg = <0 0xee100000 0 0x200>; > + interrupts = <0 165 IRQ_TYPE_LEVEL_HIGH>; > + dmas = <&dmac0 0xcd>, <&dmac0 0xce>, > + <&dmac1 0xcd>, <&dmac1 0xce>; > + dma-names = "tx", "rx", "tx", "rx"; > + clocks = <&mstp3_clks R8A7792_CLK_SDHI0>; > + power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; Do we want a "max-frequency" property here? Note that this instance doesn't support SDR104/SDR50. Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
On Wed, Jul 13, 2016 at 12:11:12AM +0300, Sergei Shtylyov wrote: > Define the generic R8A7792 part of the SDHI0 device node. > > Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> > > --- > arch/arm/boot/dts/r8a7792.dtsi | 12 ++++++++++++ > 1 file changed, 12 insertions(+) > > Index: renesas/arch/arm/boot/dts/r8a7792.dtsi > =================================================================== > --- renesas.orig/arch/arm/boot/dts/r8a7792.dtsi > +++ renesas/arch/arm/boot/dts/r8a7792.dtsi > @@ -435,6 +435,18 @@ > status = "disabled"; > }; > > + sdhi0: sd@ee100000 { > + compatible = "renesas,sdhi-r8a7792"; > + reg = <0 0xee100000 0 0x200>; I do not have the documentation available to check, however, I wonder if as per 66f47ed0e86d ("ARM: shmobile: r8a7790: tidyup SDHI register size on DTSI") the register size should be 0x328. It also looks like register the DTS for the r8a7794 needs updating along the same lines. > + interrupts = <0 165 IRQ_TYPE_LEVEL_HIGH>; > + dmas = <&dmac0 0xcd>, <&dmac0 0xce>, > + <&dmac1 0xcd>, <&dmac1 0xce>; > + dma-names = "tx", "rx", "tx", "rx"; > + clocks = <&mstp3_clks R8A7792_CLK_SDHI0>; > + power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; > + status = "disabled"; > + }; > + > jpu: jpeg-codec@fe980000 { > compatible = "renesas,jpu-r8a7792", > "renesas,rcar-gen2-jpu"; >
Hello. On 07/18/2016 01:58 AM, Simon Horman wrote: >> Define the generic R8A7792 part of the SDHI0 device node. >> >> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> >> >> --- >> arch/arm/boot/dts/r8a7792.dtsi | 12 ++++++++++++ >> 1 file changed, 12 insertions(+) >> >> Index: renesas/arch/arm/boot/dts/r8a7792.dtsi >> =================================================================== >> --- renesas.orig/arch/arm/boot/dts/r8a7792.dtsi >> +++ renesas/arch/arm/boot/dts/r8a7792.dtsi >> @@ -435,6 +435,18 @@ >> status = "disabled"; >> }; >> >> + sdhi0: sd@ee100000 { >> + compatible = "renesas,sdhi-r8a7792"; >> + reg = <0 0xee100000 0 0x200>; > > I do not have the documentation available to check, Me nether. The SDHI .zip only includes the manual for E2, H2, and M2. > however, I wonder if > as per 66f47ed0e86d ("ARM: shmobile: r8a7790: tidyup SDHI register size on > DTSI") the register size should be 0x328. I just don't know... > It also looks like register the DTS for the r8a7794 needs updating along > the same lines. Indeed. >> + interrupts = <0 165 IRQ_TYPE_LEVEL_HIGH>; >> + dmas = <&dmac0 0xcd>, <&dmac0 0xce>, >> + <&dmac1 0xcd>, <&dmac1 0xce>; >> + dma-names = "tx", "rx", "tx", "rx"; >> + clocks = <&mstp3_clks R8A7792_CLK_SDHI0>; >> + power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; >> + status = "disabled"; >> + }; >> + >> jpu: jpeg-codec@fe980000 { >> compatible = "renesas,jpu-r8a7792", >> "renesas,rcar-gen2-jpu"; I also wonder whether whether a single per-SoC SDHI "compatible" is valid. The registers and their offsets seem to differ b/w SDHI0 and the other SDHI cores... MBR, Sergei
Hi Sergei, On Mon, Jul 18, 2016 at 9:12 PM, Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> wrote: >>> --- renesas.orig/arch/arm/boot/dts/r8a7792.dtsi >>> +++ renesas/arch/arm/boot/dts/r8a7792.dtsi >>> @@ -435,6 +435,18 @@ >>> status = "disabled"; >>> }; >>> >>> + sdhi0: sd@ee100000 { >>> + compatible = "renesas,sdhi-r8a7792"; >>> + reg = <0 0xee100000 0 0x200>; >> >> >> I do not have the documentation available to check, > > Me nether. The SDHI .zip only includes the manual for E2, H2, and M2. > >> however, I wonder if >> as per 66f47ed0e86d ("ARM: shmobile: r8a7790: tidyup SDHI register size on >> DTSI") the register size should be 0x328. > > I just don't know... >>> + interrupts = <0 165 IRQ_TYPE_LEVEL_HIGH>; >>> + dmas = <&dmac0 0xcd>, <&dmac0 0xce>, >>> + <&dmac1 0xcd>, <&dmac1 0xce>; >>> + dma-names = "tx", "rx", "tx", "rx"; >>> + clocks = <&mstp3_clks R8A7792_CLK_SDHI0>; >>> + power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; >>> + status = "disabled"; >>> + }; >>> + >>> jpu: jpeg-codec@fe980000 { >>> compatible = "renesas,jpu-r8a7792", >>> "renesas,rcar-gen2-jpu"; > > I also wonder whether whether a single per-SoC SDHI "compatible" is > valid. The registers and their offsets seem to differ b/w SDHI0 and the > other SDHI cores... There's version register. BTW, given SDHI on V2H doesn't support SDR50/SDR104, unlike the instances on other R-Car Gen2 SoCs, can you please tell us the version value, as read from CTL_VERSION in sh_mobile_sdhi_sdbuf_width()? Thanks! Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
On 07/20/2016 11:07 AM, Geert Uytterhoeven wrote: >>>> --- renesas.orig/arch/arm/boot/dts/r8a7792.dtsi >>>> +++ renesas/arch/arm/boot/dts/r8a7792.dtsi >>>> @@ -435,6 +435,18 @@ >>>> status = "disabled"; >>>> }; >>>> >>>> + sdhi0: sd@ee100000 { >>>> + compatible = "renesas,sdhi-r8a7792"; >>>> + reg = <0 0xee100000 0 0x200>; >>> >>> >>> I do not have the documentation available to check, >> >> Me nether. The SDHI .zip only includes the manual for E2, H2, and M2. >> >>> however, I wonder if >>> as per 66f47ed0e86d ("ARM: shmobile: r8a7790: tidyup SDHI register size on >>> DTSI") the register size should be 0x328. >> >> I just don't know... > >>>> + interrupts = <0 165 IRQ_TYPE_LEVEL_HIGH>; >>>> + dmas = <&dmac0 0xcd>, <&dmac0 0xce>, >>>> + <&dmac1 0xcd>, <&dmac1 0xce>; >>>> + dma-names = "tx", "rx", "tx", "rx"; >>>> + clocks = <&mstp3_clks R8A7792_CLK_SDHI0>; >>>> + power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; >>>> + status = "disabled"; >>>> + }; >>>> + >>>> jpu: jpeg-codec@fe980000 { >>>> compatible = "renesas,jpu-r8a7792", >>>> "renesas,rcar-gen2-jpu"; >> >> I also wonder whether whether a single per-SoC SDHI "compatible" is >> valid. The registers and their offsets seem to differ b/w SDHI0 and the >> other SDHI cores... > > There's version register. > > BTW, given SDHI on V2H doesn't support SDR50/SDR104, unlike the instances > on other R-Car Gen2 SoCs, can you please tell us the version value, as read > from CTL_VERSION in sh_mobile_sdhi_sdbuf_width()? It's 0xCB0D, the same as on other SoCs. > Thanks! Not at all. :-) > Gr{oetje,eeting}s, > > Geert MBR, Sergei
Hi Sergei, On Wed, Jul 20, 2016 at 3:40 PM, Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> wrote: >> BTW, given SDHI on V2H doesn't support SDR50/SDR104, unlike the instances >> on other R-Car Gen2 SoCs, can you please tell us the version value, as >> read >> from CTL_VERSION in sh_mobile_sdhi_sdbuf_width()? > > It's 0xCB0D, the same as on other SoCs. Thanks! #define SDHI_VER_GEN2_SDR104 0xcb0d Not good, as it doesn't support SDR50/SDR104.... Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
On 07/20/2016 04:50 PM, Geert Uytterhoeven wrote: >>> BTW, given SDHI on V2H doesn't support SDR50/SDR104, unlike the instances >>> on other R-Car Gen2 SoCs, can you please tell us the version value, as >>> read >>> from CTL_VERSION in sh_mobile_sdhi_sdbuf_width()? >> >> It's 0xCB0D, the same as on other SoCs. > > Thanks! > > #define SDHI_VER_GEN2_SDR104 0xcb0d Not seeing this #define, where is it? > Not good, as it doesn't support SDR50/SDR104.... Does it have the register at 0x324 tho? > Gr{oetje,eeting}s, > > Geert MBR, Sergei
Index: renesas/arch/arm/boot/dts/r8a7792.dtsi =================================================================== --- renesas.orig/arch/arm/boot/dts/r8a7792.dtsi +++ renesas/arch/arm/boot/dts/r8a7792.dtsi @@ -435,6 +435,18 @@ status = "disabled"; }; + sdhi0: sd@ee100000 { + compatible = "renesas,sdhi-r8a7792"; + reg = <0 0xee100000 0 0x200>; + interrupts = <0 165 IRQ_TYPE_LEVEL_HIGH>; + dmas = <&dmac0 0xcd>, <&dmac0 0xce>, + <&dmac1 0xcd>, <&dmac1 0xce>; + dma-names = "tx", "rx", "tx", "rx"; + clocks = <&mstp3_clks R8A7792_CLK_SDHI0>; + power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; + status = "disabled"; + }; + jpu: jpeg-codec@fe980000 { compatible = "renesas,jpu-r8a7792", "renesas,rcar-gen2-jpu";
Define the generic R8A7792 part of the SDHI0 device node. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> --- arch/arm/boot/dts/r8a7792.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+)