diff mbox

[1/2] ARM: dts: r8a7792: add JPU clocks

Message ID 8298805.L3k84jpzv2@wasted.cogentembedded.com (mailing list archive)
State Accepted
Commit eebc8e2c5b7a3db19075a02730db8b73be933485
Delegated to: Simon Horman
Headers show

Commit Message

Sergei Shtylyov June 16, 2016, 10:02 p.m. UTC
Add JPU clock and its parent, M2 clock to the R8A7792 device tree.

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>

---
 arch/arm/boot/dts/r8a7792.dtsi            |   16 ++++++++++++++++
 include/dt-bindings/clock/r8a7792-clock.h |    1 +
 2 files changed, 17 insertions(+)

Comments

Geert Uytterhoeven June 17, 2016, 7:19 a.m. UTC | #1
On Fri, Jun 17, 2016 at 12:02 AM, Sergei Shtylyov
<sergei.shtylyov@cogentembedded.com> wrote:
> Add JPU clock and its parent, M2 clock to the R8A7792 device tree.
>
> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds
diff mbox

Patch

Index: renesas/arch/arm/boot/dts/r8a7792.dtsi
===================================================================
--- renesas.orig/arch/arm/boot/dts/r8a7792.dtsi
+++ renesas/arch/arm/boot/dts/r8a7792.dtsi
@@ -280,8 +280,24 @@ 
 			clock-div = <48>;
 			clock-mult = <1>;
 		};
+		m2_clk: m2 {
+			compatible = "fixed-factor-clock";
+			clocks = <&cpg_clocks R8A7792_CLK_PLL1>;
+			#clock-cells = <0>;
+			clock-div = <8>;
+			clock-mult = <1>;
+		};
 
 		/* Gate clocks */
+		mstp1_clks: mstp1_clks@e6150134 {
+			compatible = "renesas,r8a7792-mstp-clocks",
+				     "renesas,cpg-mstp-clocks";
+			reg = <0 0xe6150134 0 4>, <0 0xe6150038 0 4>;
+			clocks = <&m2_clk>;
+			#clock-cells = <1>;
+			clock-indices = <R8A7792_CLK_JPU>;
+			clock-output-names = "jpu";
+		};
 		mstp2_clks: mstp2_clks@e6150138 {
 			compatible = "renesas,r8a7792-mstp-clocks",
 				     "renesas,cpg-mstp-clocks";
Index: renesas/include/dt-bindings/clock/r8a7792-clock.h
===================================================================
--- renesas.orig/include/dt-bindings/clock/r8a7792-clock.h
+++ renesas/include/dt-bindings/clock/r8a7792-clock.h
@@ -24,6 +24,7 @@ 
 #define R8A7792_CLK_MSIOF0		0
 
 /* MSTP1 */
+#define R8A7792_CLK_JPU			6
 #define R8A7792_CLK_TMU1		11
 #define R8A7792_CLK_TMU3		21
 #define R8A7792_CLK_TMU2		22