| Message ID | 87jzsdim7m.wl-kuninori.morimoto.gx@renesas.com (mailing list archive) |
|---|---|
| State | Superseded |
| Delegated to: | Geert Uytterhoeven |
| Headers | show |
| Series | arm64: dts: renesas: Add R-Car S4 Starter Kit support | expand |
Hi Morimoto-san, On Tue, Sep 26, 2023 at 6:37 AM Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> wrote: > Add initial support for the R-Car S4 Starter Kit support > with R8A779F4 SoC. Based on a patch in the BSP. Thanks for your patch! > Signed-off-by: Michael Dege <michael.dege@renesas.com> > Signed-off-by: Yusuke Goda <yusuke.goda.sx@renesas.com> > Signed-off-by: Tam Nguyen <tam.nguyen.xa@renesas.com> > Signed-off-by: Hai Pham <hai.pham.ud@renesas.com> > Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> > Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Just as with "[PATCH v2 2/4]", please consider the transfer chain, and add Co-developed-by when needed. > --- /dev/null > +++ b/arch/arm64/boot/dts/renesas/r8a779f4-s4sk.dts > @@ -0,0 +1,243 @@ > +// SPDX-License-Identifier: (GPL-2.0 or MIT) "OR", as per commit 05c618f39089d977 ("arm64: dts: use capital "OR" for multiple licenses in SPDX") in v6.6-rc2. > +/* > + * Device Tree Source for the R-Car S4 Starter Kit board > + * > + * Copyright (C) 2023 Renesas Electronics Corp. > + */ > + > +/dts-v1/; > +#include <dt-bindings/gpio/gpio.h> > +#include "r8a779f4.dtsi" > + > +/ { > + model = "R-Car S4 Starter Kit board"; Renesas R-Car ... > + compatible = "renesas,s4sk", "renesas,r8a779f4"; Missing "renesas,r8a779f0" fallback. > + vcc_sdhi: regulator-vcc-sdhi { > + compatible = "regulator-fixed"; > + regulator-name = "SDHI Vcc"; > + regulator-min-microvolt = <3300000>; > + regulator-max-microvolt = <3300000>; It looks like this can switch between 1.8V and 3.3V using SDHI_PWR_SEL. But that is controlled through the FPGA, and according to the docs, only used for initialization. So I guess hardcoding 3.3V is OK. > + gpio = <&gpio1 24 GPIO_ACTIVE_HIGH>; > + enable-active-high; > + }; > +}; > +&extalr_clk { > + clock-frequency = <32768>; > +}; This clock (and scif_clk and ufs30_clk below) is generated by a programmable clock generator. Modelling it as a fixed-clock is fine for now. It can be replaced by an output of the clock generator later, when Linux has gained support for it. > +&i2c5 { > + pinctrl-0 = <&i2c5_pins>; > + pinctrl-names = "default"; > + > + status = "okay"; > + clock-frequency = <400000>; > + > + eeprom@50 { > + compatible = "atmel,24c16"; As the schematics say this is a genuine ST part: "st,24c16", "atmel,24c16"; > + reg = <0x50>; > + pagesize = <16>; > + }; > +}; > + > +&mmc0 { > + pinctrl-0 = <&sd_pins>; > + pinctrl-1 = <&sd_pins>; > + pinctrl-names = "default", "state_uhs"; Do you need two states if there is a single voltage? AFAIK, UHS needs 1.8V. > + > + vmmc-supply = <&vcc_sdhi>; > + vqmmc-supply = <&vcc_sdhi>; Do you need vqmmc-supply if there is a single voltage? I'm not sure about this one... > + cd-gpios = <&gpio1 23 GPIO_ACTIVE_LOW>; > + bus-width = <4>; > + status = "okay"; > +}; > + > +&pfc { > + pinctrl-0 = <&scif_clk_pins>; > + pinctrl-names = "default"; > + > + i2c2_pins: i2c2 { > + groups = "i2c2"; > + function = "i2c2"; > + }; > + > + i2c4_pins: i2c4 { > + groups = "i2c4"; > + function = "i2c4"; > + }; > + > + i2c5_pins: i2c5 { > + groups = "i2c5"; > + function = "i2c5"; > + }; > + > + sd_pins: sd { Please sort alphabetically (everywhere). > + groups = "mmc_data4", "mmc_ctrl"; > + function = "mmc"; > + power-source = <3300>; > + }; > + > + qspi0_pins: qspi0 { > + groups = "qspi0_ctrl", "qspi0_data4"; > + function = "qspi0"; > + }; There is no reference to qspi0_pins. > +&rswitch { > + pinctrl-0 = <&tsn0_pins>, <&tsn1_pins>; > + pinctrl-names = "default"; > + status = "okay"; > + > + ethernet-ports { > + #address-cells = <1>; > + #size-cells = <0>; > + > + port@0 { > + reg = <0>; > + phy-handle = <&u101>; > + phy-mode = "sgmii"; > + phys = <ð_serdes 0>; > + > + mdio { > + #address-cells = <1>; > + #size-cells = <0>; > + > + u101: ethernet-phy@1 { This label seems to be copied from Spider? On S4SK, the PHY is IC99, so perhaps "ic99"? Although I'm open for a different name like "gbe_phy0" or "sgmii_phy0"? > + reg = <1>; > + compatible = "ethernet-phy-ieee802.3-c45"; Missing interrupt (GP3_10). > + }; > + }; > + }; > + > + port@1 { > + reg = <1>; > + phy-handle = <&u201>; > + phy-mode = "sgmii"; > + phys = <ð_serdes 1>; > + > + mdio { > + #address-cells = <1>; > + #size-cells = <0>; > + > + u201: ethernet-phy@2 { "ic102", or a better name... > + reg = <2>; > + compatible = "ethernet-phy-ieee802.3-c45"; Missing interrupt (GP3_11). > + }; > + }; > + }; > + > + port@2 { > + status = "disabled"; > + }; > + }; > +}; Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
Hi Geert > > Signed-off-by: Michael Dege <michael.dege@renesas.com> > > Signed-off-by: Yusuke Goda <yusuke.goda.sx@renesas.com> > > Signed-off-by: Tam Nguyen <tam.nguyen.xa@renesas.com> > > Signed-off-by: Hai Pham <hai.pham.ud@renesas.com> > > Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> > > Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> > > Just as with "[PATCH v2 2/4]", please consider the transfer chain, > and add Co-developed-by when needed. It is based on BSP, but not as-is. It is following same style of your similar patch (Based on BSP). Co-developed with Shimoda-san. Will add it. > > +// SPDX-License-Identifier: (GPL-2.0 or MIT) > > "OR", as per commit 05c618f39089d977 ("arm64: dts: use capital "OR" > for multiple licenses in SPDX") in v6.6-rc2. will fix in v3 > > + model = "R-Car S4 Starter Kit board"; > > Renesas R-Car ... Offical S4 SK doesn't have "Renesas". > > +&i2c5 { > > + pinctrl-0 = <&i2c5_pins>; > > + pinctrl-names = "default"; > > + > > + status = "okay"; > > + clock-frequency = <400000>; > > + > > + eeprom@50 { > > + compatible = "atmel,24c16"; > > As the schematics say this is a genuine ST part: > > "st,24c16", "atmel,24c16"; I have removed "st,24c16", but will add again in v3 > > +&mmc0 { > > + pinctrl-0 = <&sd_pins>; > > + pinctrl-1 = <&sd_pins>; > > + pinctrl-names = "default", "state_uhs"; > > Do you need two states if there is a single voltage? > AFAIK, UHS needs 1.8V. > > > + > > + vmmc-supply = <&vcc_sdhi>; > > + vqmmc-supply = <&vcc_sdhi>; > > Do you need vqmmc-supply if there is a single voltage? > I'm not sure about this one... Shimoda-san has double-checked. It can use UHS, but this FPGA can't handle 1.8v. v3 will remove UHS / vqmmc. > > +&pfc { (snip) > Please sort alphabetically (everywhere). will do > This label seems to be copied from Spider? > On S4SK, the PHY is IC99, so perhaps "ic99"? > Although I'm open for a different name like "gbe_phy0" > or "sgmii_phy0"? (snip) > Missing interrupt (GP3_10). will fix in v3 Thank you for your help !! Best regards --- Kuninori Morimoto
diff --git a/arch/arm64/boot/dts/renesas/Makefile b/arch/arm64/boot/dts/renesas/Makefile index 7114cbbd8713..751cb0c65dcd 100644 --- a/arch/arm64/boot/dts/renesas/Makefile +++ b/arch/arm64/boot/dts/renesas/Makefile @@ -61,6 +61,7 @@ dtb-$(CONFIG_ARCH_R8A77995) += r8a77995-draak.dtb dtb-$(CONFIG_ARCH_R8A779A0) += r8a779a0-falcon.dtb dtb-$(CONFIG_ARCH_R8A779F0) += r8a779f0-spider.dtb +dtb-$(CONFIG_ARCH_R8A779F0) += r8a779f4-s4sk.dtb dtb-$(CONFIG_ARCH_R8A779G0) += r8a779g0-white-hawk.dtb dtb-$(CONFIG_ARCH_R8A779G0) += r8a779g0-white-hawk-ard-audio-da7212.dtbo diff --git a/arch/arm64/boot/dts/renesas/r8a779f4-s4sk.dts b/arch/arm64/boot/dts/renesas/r8a779f4-s4sk.dts new file mode 100644 index 000000000000..9eb846caac63 --- /dev/null +++ b/arch/arm64/boot/dts/renesas/r8a779f4-s4sk.dts @@ -0,0 +1,243 @@ +// SPDX-License-Identifier: (GPL-2.0 or MIT) +/* + * Device Tree Source for the R-Car S4 Starter Kit board + * + * Copyright (C) 2023 Renesas Electronics Corp. + */ + +/dts-v1/; +#include <dt-bindings/gpio/gpio.h> +#include "r8a779f4.dtsi" + +/ { + model = "R-Car S4 Starter Kit board"; + compatible = "renesas,s4sk", "renesas,r8a779f4"; + + aliases { + serial0 = &hscif0; + serial1 = &hscif1; + eth0 = &rswitch; + }; + + chosen { + bootargs = "ignore_loglevel rw root=/dev/nfs ip=on"; + stdout-path = "serial0:921600n8"; + }; + + memory@48000000 { + device_type = "memory"; + /* first 128MB is reserved for secure area. */ + /* The last 512MB is reserved for CR. */ + reg = <0x0 0x48000000 0x0 0x58000000>; + }; + + memory@480000000 { + device_type = "memory"; + reg = <0x4 0x80000000 0x0 0x80000000>; + }; + + vcc_sdhi: regulator-vcc-sdhi { + compatible = "regulator-fixed"; + regulator-name = "SDHI Vcc"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio1 24 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; +}; + +ð_serdes { + status = "okay"; +}; + +&extal_clk { + clock-frequency = <20000000>; +}; + +&extalr_clk { + clock-frequency = <32768>; +}; + +&hscif0 { + pinctrl-0 = <&hscif0_pins>; + pinctrl-names = "default"; + + uart-has-rtscts; + status = "okay"; +}; + +&hscif1 { + pinctrl-0 = <&hscif1_pins>; + pinctrl-names = "default"; + + uart-has-rtscts; + status = "okay"; +}; + +&i2c2 { + pinctrl-0 = <&i2c2_pins>; + pinctrl-names = "default"; + + status = "okay"; + clock-frequency = <400000>; +}; + +&i2c4 { + pinctrl-0 = <&i2c4_pins>; + pinctrl-names = "default"; + + status = "okay"; + clock-frequency = <400000>; +}; + +&i2c5 { + pinctrl-0 = <&i2c5_pins>; + pinctrl-names = "default"; + + status = "okay"; + clock-frequency = <400000>; + + eeprom@50 { + compatible = "atmel,24c16"; + reg = <0x50>; + pagesize = <16>; + }; +}; + +&mmc0 { + pinctrl-0 = <&sd_pins>; + pinctrl-1 = <&sd_pins>; + pinctrl-names = "default", "state_uhs"; + + vmmc-supply = <&vcc_sdhi>; + vqmmc-supply = <&vcc_sdhi>; + cd-gpios = <&gpio1 23 GPIO_ACTIVE_LOW>; + bus-width = <4>; + status = "okay"; +}; + +&pfc { + pinctrl-0 = <&scif_clk_pins>; + pinctrl-names = "default"; + + i2c2_pins: i2c2 { + groups = "i2c2"; + function = "i2c2"; + }; + + i2c4_pins: i2c4 { + groups = "i2c4"; + function = "i2c4"; + }; + + i2c5_pins: i2c5 { + groups = "i2c5"; + function = "i2c5"; + }; + + sd_pins: sd { + groups = "mmc_data4", "mmc_ctrl"; + function = "mmc"; + power-source = <3300>; + }; + + qspi0_pins: qspi0 { + groups = "qspi0_ctrl", "qspi0_data4"; + function = "qspi0"; + }; + + hscif0_pins: hscif0 { + groups = "hscif0_data", "hscif0_ctrl"; + function = "hscif0"; + }; + + hscif1_pins: hscif1 { + groups = "hscif1_data", "hscif1_ctrl"; + function = "hscif1"; + }; + + scif_clk_pins: scif_clk { + groups = "scif_clk"; + function = "scif_clk"; + }; + + tsn0_pins: tsn0 { + groups = "tsn0_mdio_b", "tsn0_link_b"; + function = "tsn0"; + drive-strength = <18>; + power-source = <3300>; + }; + + tsn1_pins: tsn1 { + groups = "tsn1_mdio_b", "tsn1_link_b"; + function = "tsn1"; + drive-strength = <18>; + power-source = <3300>; + }; +}; + +&rswitch { + pinctrl-0 = <&tsn0_pins>, <&tsn1_pins>; + pinctrl-names = "default"; + status = "okay"; + + ethernet-ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + phy-handle = <&u101>; + phy-mode = "sgmii"; + phys = <ð_serdes 0>; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + u101: ethernet-phy@1 { + reg = <1>; + compatible = "ethernet-phy-ieee802.3-c45"; + }; + }; + }; + + port@1 { + reg = <1>; + phy-handle = <&u201>; + phy-mode = "sgmii"; + phys = <ð_serdes 1>; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + u201: ethernet-phy@2 { + reg = <2>; + compatible = "ethernet-phy-ieee802.3-c45"; + }; + }; + }; + + port@2 { + status = "disabled"; + }; + }; +}; + +&rwdt { + timeout-sec = <60>; + status = "okay"; +}; + +&scif_clk { + clock-frequency = <24000000>; +}; + +&ufs { + status = "okay"; +}; + +&ufs30_clk { + clock-frequency = <38400000>; +};