From patchwork Thu May 27 04:36:38 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kuninori Morimoto X-Patchwork-Id: 12283271 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C8DDEC47089 for ; Thu, 27 May 2021 04:36:41 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id AA71D613D4 for ; Thu, 27 May 2021 04:36:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229831AbhE0EiN (ORCPT ); Thu, 27 May 2021 00:38:13 -0400 Received: from relmlor1.renesas.com ([210.160.252.171]:22019 "EHLO relmlie5.idc.renesas.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S233657AbhE0EiL (ORCPT ); Thu, 27 May 2021 00:38:11 -0400 Date: 27 May 2021 13:36:38 +0900 X-IronPort-AV: E=Sophos;i="5.82,333,1613401200"; d="scan'208";a="82559971" Received: from unknown (HELO relmlir5.idc.renesas.com) ([10.200.68.151]) by relmlie5.idc.renesas.com with ESMTP; 27 May 2021 13:36:38 +0900 Received: from mercury.renesas.com (unknown [10.166.252.133]) by relmlir5.idc.renesas.com (Postfix) with ESMTP id ECD19401AEA5; Thu, 27 May 2021 13:36:37 +0900 (JST) Message-ID: <87pmxclrmy.wl-kuninori.morimoto.gx@renesas.com> From: Kuninori Morimoto Subject: [PATCH v3 1/3] clk: renesas: r8a77995: Add ZA2 clock User-Agent: Wanderlust/2.15.9 Emacs/26.3 Mule/6.0 To: Geert Uytterhoeven Cc: Magnus , linux-renesas-soc@vger.kernel.org, kazuya.mizuguchi.ks@renesas.com, yoshihiro.shimoda.uh@renesas.com, hoai.luu.ub@renesas.com, takeshi.kihara.df@renesas.com, harunobu.kurokawa.dn@renesas.com, khiem.nguyen.xt@renesas.com, hien.dang.eb@renesas.com In-Reply-To: <87r1hslrno.wl-kuninori.morimoto.gx@renesas.com> References: <87r1hslrno.wl-kuninori.morimoto.gx@renesas.com> MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org From: Kuninori Morimoto R-Car D3 ZA2 clock is from PLL0D3 or S0, and it can be controlled by ZA2CKCR. It is needed for R-Car Sound, but is not used so far. Using default settings is very enough at this point. This patch adds it by DEF_FIXED(). Link: https://lore.kernel.org/r/87k0nyci2t.wl-kuninori.morimoto.gx@renesas.com Link: https://lore.kernel.org/r/87sg2boi3h.wl-kuninori.morimoto.gx@renesas.com Signed-off-by: Kuninori Morimoto Reviewed-by: Geert Uytterhoeven --- drivers/clk/renesas/r8a77995-cpg-mssr.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/clk/renesas/r8a77995-cpg-mssr.c b/drivers/clk/renesas/r8a77995-cpg-mssr.c index 9cfd00cf4e69..81c0bc1e78af 100644 --- a/drivers/clk/renesas/r8a77995-cpg-mssr.c +++ b/drivers/clk/renesas/r8a77995-cpg-mssr.c @@ -75,6 +75,7 @@ static const struct cpg_core_clk r8a77995_core_clks[] __initconst = { DEF_RATE(".oco", CLK_OCO, 8 * 1000 * 1000), /* Core Clock Outputs */ + DEF_FIXED("za2", R8A77995_CLK_ZA2, CLK_PLL0D3, 2, 1), DEF_FIXED("z2", R8A77995_CLK_Z2, CLK_PLL0D3, 1, 1), DEF_FIXED("ztr", R8A77995_CLK_ZTR, CLK_PLL1, 6, 1), DEF_FIXED("zt", R8A77995_CLK_ZT, CLK_PLL1, 4, 1),