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Fri, 1 Jul 2022 01:39:51 +0000 Message-ID: <87tu81sja1.wl-kuninori.morimoto.gx@renesas.com> From: Kuninori Morimoto Subject: [PATCH v4 16/23] pinctrl: renesas: r8a779g0: add missing SCIF1_X User-Agent: Wanderlust/2.15.9 Emacs/26.3 Mule/6.0 To: Geert Uytterhoeven , Geert Uytterhoeven , Geert Uytterhoeven Cc: Linux-Renesas , Linus Walleij , linux-gpio@vger.kernel.org In-Reply-To: <87h741ty20.wl-kuninori.morimoto.gx@renesas.com> References: <87h741ty20.wl-kuninori.morimoto.gx@renesas.com> Date: Fri, 1 Jul 2022 01:39:51 +0000 X-ClientProxiedBy: TY2PR02CA0071.apcprd02.prod.outlook.com (2603:1096:404:e2::35) To OS3PR01MB8426.jpnprd01.prod.outlook.com (2603:1096:604:194::10) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 041c3f02-1607-4e95-fb07-08da5b02974d X-MS-TrafficTypeDiagnostic: TYCPR01MB7362:EE_ X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: IKeunfn+tBNDH0GKv7fbk5lNsm5QzUZ9+X8YAkJ3iQkJn7SZ/PpDdUHb6VACWh/x39ihnDCjgs+nsdWYp43ayKZHRUEexi6szCnmk4qdQdWmO6s7VeIuSNyAxyWjgafAiK6Uq//sW9HBNgPadgd7wBI6z/+6NU5pwsV1efmtGMmIIKW6fLK4MIaxEvXzDCzbSrz+pXH3SN/s9TyLodyGAofwlOMHks/TSKI3JaZ26Y27A2LTEy0IDpMD/ofie1DKzOh0FZp8W1lnLhawVt+FFuMslS1ZJ0/VT8b00CsggP/7HmZ7FFgVkSu5M9rCVFL01bHZ+3IhmjtVsr3nXk8N3XeY7bAktD5rV4z73tXuqr8+m4HmURav7KK64WBLvEqOKDTIMxd0c8b7njJMS4zDKUQ0pqc0q8qOXPHunBfNFsNqI+RRLhYUlpfq5upZsuT+2Ix8yAG8ZK42fg8W4zsxZ2QiPMYy1JI24nc6gu0XaARvJul5RMAD1D5NjVTizKtwPXabIgE/8FTHTnZYn89upSTpOUGrm/l97FYy44vRqH1LggGj1p8qvtIpdttS0wzLZQHSZaMhqk8Omjgp5IguoxHPMx2r1XS1t0gD1EE/n2LTUq7IJIVnAxnw/xAw7QPHR5mWEFU+wmzptxgj7W7WMnNMp0BJIdfK4WvL7YDdERMsrNJULja0EJiI7GDLhX3rSD5jklsxzIhWKM+OYKq4GAKMrQXrdlIoO/exOdwQhMGrJ/ZZDdgzYIBB8g51CH474zRAGICCJAgCXNQPbFNod/zBWZUI0LQat3wL2TE/PxIYy8K+kenUfGGjonaAtVSX X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:OS3PR01MB8426.jpnprd01.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230016)(4636009)(39860400002)(396003)(376002)(136003)(346002)(366004)(6512007)(86362001)(54906003)(316002)(26005)(110136005)(5660300002)(41300700001)(52116002)(6506007)(66946007)(38100700002)(38350700002)(4326008)(8676002)(66556008)(66476007)(6486002)(478600001)(2906002)(2616005)(186003)(83380400001)(36756003)(8936002);DIR:OUT;SFP:1102; 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Because Document (Rev.0.51) has 2xSCIF1 with no suffix (_A, _B), this patch name it as _X. Signed-off-by: Kuninori Morimoto Reviewed-by: Geert Uytterhoeven --- drivers/pinctrl/renesas/pfc-r8a779g0.c | 51 ++++++++++++++++++++++---- 1 file changed, 43 insertions(+), 8 deletions(-) diff --git a/drivers/pinctrl/renesas/pfc-r8a779g0.c b/drivers/pinctrl/renesas/pfc-r8a779g0.c index 114b558d75b7..cff48ba6f5d7 100644 --- a/drivers/pinctrl/renesas/pfc-r8a779g0.c +++ b/drivers/pinctrl/renesas/pfc-r8a779g0.c @@ -302,13 +302,13 @@ #define IP0SR1_15_12 FM(MSIOF1_SCK) FM(HSCK3_A) FM(CTS3_N) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) #define IP0SR1_19_16 FM(MSIOF1_TXD) FM(HRX3_A) FM(SCK3) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) #define IP0SR1_23_20 FM(MSIOF1_RXD) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) -#define IP0SR1_27_24 FM(MSIOF0_SS2) FM(HTX1_X) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) -#define IP0SR1_31_28 FM(MSIOF0_SS1) FM(HRX1_X) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP0SR1_27_24 FM(MSIOF0_SS2) FM(HTX1_X) FM(TX1_X) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP0SR1_31_28 FM(MSIOF0_SS1) FM(HRX1_X) FM(RX1_X) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) /* IP1SR1 */ /* 0 */ /* 1 */ /* 2 */ /* 3 4 5 6 7 8 9 A B C D E F */ -#define IP1SR1_3_0 FM(MSIOF0_SYNC) FM(HCTS1_N_X) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) -#define IP1SR1_7_4 FM(MSIOF0_TXD) FM(HRTS1_N_X) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) -#define IP1SR1_11_8 FM(MSIOF0_SCK) FM(HSCK1_X) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP1SR1_3_0 FM(MSIOF0_SYNC) FM(HCTS1_N_X) FM(CTS1_N_X) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP1SR1_7_4 FM(MSIOF0_TXD) FM(HRTS1_N_X) FM(RTS1_N_X) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP1SR1_11_8 FM(MSIOF0_SCK) FM(HSCK1_X) FM(SCK1_X) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) #define IP1SR1_15_12 FM(MSIOF0_RXD) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) #define IP1SR1_19_16 FM(HTX0) FM(TX0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) #define IP1SR1_23_20 FM(HCTS0_N) FM(CTS0_N) FM(PWM8) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) @@ -818,19 +818,24 @@ static const u16 pinmux_data[] = { PINMUX_IPSR_GPSR(IP0SR1_27_24, MSIOF0_SS2), PINMUX_IPSR_GPSR(IP0SR1_27_24, HTX1_X), + PINMUX_IPSR_GPSR(IP0SR1_27_24, TX1_X), PINMUX_IPSR_GPSR(IP0SR1_31_28, MSIOF0_SS1), PINMUX_IPSR_GPSR(IP0SR1_31_28, HRX1_X), + PINMUX_IPSR_GPSR(IP0SR1_31_28, RX1_X), /* IP1SR1 */ PINMUX_IPSR_GPSR(IP1SR1_3_0, MSIOF0_SYNC), PINMUX_IPSR_GPSR(IP1SR1_3_0, HCTS1_N_X), + PINMUX_IPSR_GPSR(IP1SR1_3_0, CTS1_N_X), PINMUX_IPSR_GPSR(IP1SR1_7_4, MSIOF0_TXD), PINMUX_IPSR_GPSR(IP1SR1_7_4, HRTS1_N_X), + PINMUX_IPSR_GPSR(IP1SR1_7_4, RTS1_N_X), PINMUX_IPSR_GPSR(IP1SR1_11_8, MSIOF0_SCK), PINMUX_IPSR_GPSR(IP1SR1_11_8, HSCK1_X), + PINMUX_IPSR_GPSR(IP1SR1_11_8, SCK1_X), PINMUX_IPSR_GPSR(IP1SR1_15_12, MSIOF0_RXD), @@ -2181,6 +2186,29 @@ static const unsigned int scif1_ctrl_mux[] = { RTS1_N_MARK, CTS1_N_MARK, }; +/* - SCIF1_X ------------------------------------------------------------------ */ +static const unsigned int scif1_data_x_pins[] = { + /* RX1_X, TX1_X */ + RCAR_GP_PIN(1, 7), RCAR_GP_PIN(1, 6), +}; +static const unsigned int scif1_data_x_mux[] = { + RX1_X_MARK, TX1_X_MARK, +}; +static const unsigned int scif1_clk_x_pins[] = { + /* SCK1_X */ + RCAR_GP_PIN(1, 10), +}; +static const unsigned int scif1_clk_x_mux[] = { + SCK1_X_MARK, +}; +static const unsigned int scif1_ctrl_x_pins[] = { + /* RTS1_N_X, CTS1_N_X */ + RCAR_GP_PIN(1, 9), RCAR_GP_PIN(1, 8), +}; +static const unsigned int scif1_ctrl_x_mux[] = { + RTS1_N_X_MARK, CTS1_N_X_MARK, +}; + /* - SCIF3 ------------------------------------------------------------------ */ static const unsigned int scif3_data_pins[] = { /* RX3, TX3 */ @@ -2501,9 +2529,12 @@ static const struct sh_pfc_pin_group pinmux_groups[] = { SH_PFC_PIN_GROUP(scif0_data), SH_PFC_PIN_GROUP(scif0_clk), SH_PFC_PIN_GROUP(scif0_ctrl), - SH_PFC_PIN_GROUP(scif1_data), - SH_PFC_PIN_GROUP(scif1_clk), - SH_PFC_PIN_GROUP(scif1_ctrl), + SH_PFC_PIN_GROUP(scif1_data), /* suffix might be updated */ + SH_PFC_PIN_GROUP(scif1_data_x), /* suffix might be updated */ + SH_PFC_PIN_GROUP(scif1_clk), /* suffix might be updated */ + SH_PFC_PIN_GROUP(scif1_clk_x), /* suffix might be updated */ + SH_PFC_PIN_GROUP(scif1_ctrl), /* suffix might be updated */ + SH_PFC_PIN_GROUP(scif1_ctrl_x), /* suffix might be updated */ SH_PFC_PIN_GROUP(scif3_data), /* suffix might be updated */ SH_PFC_PIN_GROUP(scif3_data_a), /* suffix might be updated */ SH_PFC_PIN_GROUP(scif3_clk), /* suffix might be updated */ @@ -2786,9 +2817,13 @@ static const char * const scif0_groups[] = { }; static const char * const scif1_groups[] = { + /* suffix might be updated */ "scif1_data", + "scif1_data_x", "scif1_clk", + "scif1_clk_x", "scif1_ctrl", + "scif1_ctrl_x", }; static const char * const scif3_groups[] = {